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ICS841604AGILF PDF预览

ICS841604AGILF

更新时间: 2024-11-02 15:34:35
品牌 Logo 应用领域
艾迪悌 - IDT 时钟光电二极管外围集成电路
页数 文件大小 规格书
16页 353K
描述
Clock Generator, 125MHz, PDSO28, 6.10 X 9.70 MM, 0.92 MM HEIGHT, ROHS COMPLIANT, MO-153, TSSOP-28

ICS841604AGILF 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Obsolete零件包装代码:TSSOP
包装说明:TSSOP,针数:28
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:5.22
JESD-30 代码:R-PDSO-G28JESD-609代码:e3
长度:9.7 mm端子数量:28
最高工作温度:85 °C最低工作温度:-40 °C
最大输出时钟频率:125 MHz封装主体材料:PLASTIC/EPOXY
封装代码:TSSOP封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH峰值回流温度(摄氏度):260
认证状态:Not Qualified座面最大高度:1.2 mm
最大供电电压:3.465 V最小供电电压:3.135 V
标称供电电压:3.3 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子面层:Matte Tin (Sn)端子形式:GULL WING
端子节距:0.65 mm端子位置:DUAL
处于峰值回流温度下的最长时间:30宽度:6.1 mm
uPs/uCs/外围集成电路类型:CLOCK GENERATOR, OTHERBase Number Matches:1

ICS841604AGILF 数据手册

 浏览型号ICS841604AGILF的Datasheet PDF文件第2页浏览型号ICS841604AGILF的Datasheet PDF文件第3页浏览型号ICS841604AGILF的Datasheet PDF文件第4页浏览型号ICS841604AGILF的Datasheet PDF文件第5页浏览型号ICS841604AGILF的Datasheet PDF文件第6页浏览型号ICS841604AGILF的Datasheet PDF文件第7页 
FEMTOCLOCKS™ CRYSTAL-TO-HCSL  
CLOCK GENERATOR  
ICS841604I  
GENERAL DESCRIPTION  
FEATURES  
The ICS841604I is an optimized PCIe and sRIO  
• Four differential clock outputs: configurable for PCIe (100MHz)  
and sRIO (125MHz) clock signals  
ICS  
HiPerClockS™  
clock generator and member of the HiPerClocks™  
family of high-performance clock solutions from  
• Selectable crystal oscillator interface, 25MHz, 18pF parallel  
resonant crystal or LVCMOS/LVTTL single-ended reference  
clock input  
IDT. The device uses a 25MHz parallel crystal to  
generate 100MHz and 125MHz clock signals,  
replacing solutions requiring multiple oscillator and fanout buffer  
solutions. The device has excellent phase jitter (< 1ps rms)  
suitable to clock components requiring precise and low-jitter  
PCIe or sRIO or both clock signals. Designed for telecom,  
networking and industrial applications, the ICS841604I can also  
drive the high-speed sRIO and PCIe SerDes clock inputs of  
communication processors, DSPs, switches and bridges.  
• Supports the following output frequencies:  
100MHz or 125MHz  
• VCO: 500MHz  
• PLL bypass and output enable  
• PCI Express (2.5Gb/s) and Gen 2 (5 Gb/s) jitter compliant  
• RMS phase jitter, 125MHz, using a 25MHz crystal  
(1.875MHz – 20MHz): 0.45ps (typical)  
• Full 3.3V power supply mode  
• -40°C to 85°C ambient operating temperature  
• Available in both standard (RoHS 5) and lead-free (RoHS 6)  
packages  
BLOCK DIAGRAM  
PIN ASSIGNMENT  
XTAL_IN  
REF_SEL  
REF_IN  
VDD  
1
2
3
4
VDDA  
BYPASS  
IREF  
28  
27  
26  
25  
Q0  
1
0
OSC  
nQ0  
FemtoClock  
XTAL_OUT  
÷N  
FSEL  
GND  
PLL  
0
VCO = 500MHz  
÷4  
÷5 (default)  
Pulldown  
Q1  
XTAL_IN  
24  
23  
22  
VDD  
nQ3  
Q3  
nQ2  
Q2  
5
6
7
REF_IN  
1
XTAL_OUT  
nQ1  
MR/nOE  
VDD  
nc  
Pulldown  
REF_SEL  
8
21  
20  
19  
18  
17  
16  
15  
Q2  
9
M = ÷20  
GND  
nQ1  
Q1  
nQ0  
Q0  
10  
11  
12  
13  
nc  
nQ2  
IREF  
nc  
nc  
GND  
VDD  
Pulldown  
BYPASS  
Q3  
14  
Pulldown  
Pulldown  
FSEL  
nQ3  
ICS841604I  
28-Lead TSSOP  
6.1mm x 9.7mm x 0.925mm  
package body  
MR/nOE  
G Package  
Top View  
IDT/ ICSHCSL CLOCK GENERATOR  
1
ICS841604AGI REV. A JULY 10, 2008  

ICS841604AGILF 替代型号

型号 品牌 替代类型 描述 数据表
841604AGILF IDT

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