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HY5Y5A6DF-HF PDF预览

HY5Y5A6DF-HF

更新时间: 2024-02-20 18:16:05
品牌 Logo 应用领域
海力士 - HYNIX 时钟动态存储器内存集成电路
页数 文件大小 规格书
25页 214K
描述
Synchronous DRAM, 16MX16, 5.4ns, CMOS, PBGA54

HY5Y5A6DF-HF 技术参数

生命周期:Obsolete包装说明:FBGA, BGA54,9X9,32
Reach Compliance Code:unknown风险等级:5.84
最长访问时间:5.4 ns最大时钟频率 (fCLK):133 MHz
I/O 类型:COMMON交错的突发长度:1,2,4,8
JESD-30 代码:S-PBGA-B54内存密度:268435456 bit
内存集成电路类型:SYNCHRONOUS DRAM内存宽度:16
端子数量:54字数:16777216 words
字数代码:16000000最高工作温度:70 °C
最低工作温度:-25 °C组织:16MX16
输出特性:3-STATE封装主体材料:PLASTIC/EPOXY
封装代码:FBGA封装等效代码:BGA54,9X9,32
封装形状:SQUARE封装形式:GRID ARRAY, FINE PITCH
电源:3/3.3 V认证状态:Not Qualified
刷新周期:8192连续突发长度:1,2,4,8,FP
最大待机电流:0.00035 A子类别:DRAMs
最大压摆率:0.18 mA表面贴装:YES
技术:CMOS温度等级:OTHER
端子形式:BALL端子节距:0.8 mm
端子位置:BOTTOMBase Number Matches:1

HY5Y5A6DF-HF 数据手册

 浏览型号HY5Y5A6DF-HF的Datasheet PDF文件第18页浏览型号HY5Y5A6DF-HF的Datasheet PDF文件第19页浏览型号HY5Y5A6DF-HF的Datasheet PDF文件第20页浏览型号HY5Y5A6DF-HF的Datasheet PDF文件第22页浏览型号HY5Y5A6DF-HF的Datasheet PDF文件第23页浏览型号HY5Y5A6DF-HF的Datasheet PDF文件第24页 
Preliminary  
HY5Y5A6D(L/S)F(P)-xF  
4Banks x 4M x 16bits Synchronous DRAM  
AC CHARACTERISTICS I (AC operating conditions unless otherwise noted)  
H
Parameter  
Symbol  
Unit  
Note  
Min  
7.5  
9.5  
2.5  
2.5  
-
Max  
CAS Latency=3  
CAS Latency=2  
tCK3  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
System Clock  
Cycle Time  
1000  
tCK2  
tCHW  
tCLW  
tAC3  
tAC2  
tOH  
Clock High Pulse Width  
Clock Low Pulse Width  
-
1
1
-
CAS Latency=3  
CAS Latency=2  
5.4  
Access Time  
From Clock  
2
-
7
Data-out Hold Time  
Data-Input Setup Time  
Data-Input Hold Time  
Address Setup Time  
Address Hold Time  
CKE Setup Time  
2.0  
2.0  
1.0  
2.0  
1.0  
2.0  
1.0  
2.0  
1.0  
1.0  
-
-
tDS  
-
1
1
1
1
1
1
1
1
tDH  
-
tAS  
-
tAH  
-
-
tCKS  
tCKH  
tCS  
CKE Hold Time  
-
Command Setup Time  
Command Hold Time  
-
tCH  
-
CLK to Data Output in Low-Z Time  
tOLZ  
tOHZ3  
tOHZ2  
-
CAS Latency=3  
CAS Latency=2  
5.4  
7.0  
CLK to Data Output in  
High-Z Time  
-
Note :  
1. Assume tR / tF (input rise and fall time) is 1ns. If tR & tF > 1ns, then [(tR+tF)/2-1]ns should be added to the parameter.  
2. Access time to be measured with input signals of 1V/ns edge rate, from 0.8V to 0.2V. If tR > 1ns,  
then (tR/2-0.5)ns should be added to the parameter.  
Rev 0.3 / Aug. 2003  
21  

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