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HS9-82C37ARH/SAMPLE

更新时间: 2024-09-07 22:32:59
品牌 Logo 应用领域
哈里斯 - HARRIS 控制器
页数 文件大小 规格书
28页 256K
描述
Radiation Hardened CMOS High Performance Programmable DMA Controller

HS9-82C37ARH/SAMPLE 数据手册

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S E M I C O N D U C T O R  
HS-82C37ARH  
Radiation Hardened CMOS High  
Performance Programmable DMA Controller  
August 1995  
Features  
Description  
• Radiation Hardened  
The Harris HS-82C37ARH is an enhanced, radiation  
hardened CMOS version of the industry standard 8237A  
Direct Memory Access (DMA) controller, fabricated using the  
Harris hardened field, self-aligned silicon gate CMOS  
process. The HS-82C37ARH offers increased functionality,  
improved performance, and dramatically reduced power  
consumption for the radiation environment. The high speed,  
radiation hardness, and industry standard configuration of  
the HS-82C37ARH make it compatible with radiation  
- Total Dose >105 RAD (Si)  
- Transient Upset > 108 RAD (Si)/s  
- Latch Up Free EPI-CMOS  
• Low Power Consumption  
- IDDSB = 50µA Maximum  
- IDDOP = 4.0mA/MHz Maximum  
• Pin Compatible with NMOS 8237A and the Harris hardened microprocessors such as the HS-80C85RH and  
82C37A the HS-80C86RH.  
• High Speed Data Transfers Up To 2.5 MBPS With 5MHz The HS-82C37ARH can improve system performance by  
Clock  
allowing external devices to transfer data directly to or from  
system memory. Memory-to-memory transfer capability is  
also provided, along with a memory block initialization  
feature. DMA requests may be generated by either  
hardware or software, and each channel is independently  
• Four Independent Maskable Channels With Autoinitializa-  
tion Capability  
• Expandable to Any Number of Channels  
• Memory-to-Memory Transfer Capability  
• CMOS Compatible  
programmable with  
operation.  
a variety of features for flexible  
Static CMOS circuit design insures low operating power and  
allows gated clock operation for an even further reduction of  
power. Multimode programmability allows the user to select  
from three basic types of DMA services, and reconfiguration  
under program control is possible even with the clock to the  
controller stopped. Each channel has a full 64K address and  
word count range, and may be programmed to autoinitialize  
these registers following DMA termination (end of process).  
The Harris hardened field CMOS process results in  
performance equal to or greater than existing radiation resis-  
tant products at a fraction of the power.  
• Hardened Field, Self-Aligned, Junction Isolated CMOS  
Process  
• Single 5V Supply  
• Military Temperature Range -55oC to +125oC  
Ordering Information  
PART NUMBER  
HS1-82C37ARH-Q  
TEMPERATURE RANGE  
PACKAGE  
o
o
-55 C to +125 C  
40 Lead SBDIP  
o
o
HS1-82C37ARH-8  
-55 C to +125 C  
40 Lead SBDIP  
o
HS1-82C37ARH-Sample  
HS9-82C37ARH-Q  
+25 C  
40 Lead SBDIP  
o
o
-55 C to +125 C  
42 Lead Ceramic Flatpack  
42 Lead Ceramic Flatpack  
42 Lead Ceramic Flatpack  
o
o
HS9-82C37ARH-8  
-55 C to +125 C  
o
HS9-82C37ARH/Sample  
+25 C  
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper I.C. Handling Procedures.  
Spec Number 518058  
File Number 3042.1  
Copyright © Harris Corporation 1995  
1

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