Datasheet > HEF4013BP-Q100

HEF4013BP-Q100

更新时间： 2024-09-17 01:15:15

品牌	Logo	应用领域
恩智浦 - NXP		/
页数	文件大小	规格书
16页	129K
描述
Standardized symmetrical output characteristics

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HEF4013BP-Q100 数据手册

HEF4013B-Q100

Dual D-type flip-flop

Rev. 2 — 20 February 2013

Product data sheet

1. General description

The HEF4013B-Q100 is a dual D-type flip-flop that features independent set-direct input

(SD), clear-direct input (CD), clock input (CP) and outputs (Q, Q). Data is accepted when

CP is LOW and is transferred to the output on the positive-going edge of the clock. The

active HIGH asynchronous CD and SD inputs are independent and override the D or CP

inputs. The outputs are buffered for best system performance. The Schmitt trigger action

of the clock inputs, makes the circuit highly tolerant of slower clock rise and fall times.

It operates over a recommended V_DDpower supply range of 3 V to 15 V referenced to V_SS

(usually ground). Connect unused inputs to V_DD, V_SS, or another input.

This product has been qualified to the Automotive Electronics Council (AEC) standard

Q100 (Grade 1) and is suitable for use in automotive applications.

2. Features and benefits

 Automotive product qualification in accordance with AEC-Q100 (Grade 1)

 Specified from 40 C to +85 C and from 40 C to +125 C

 Tolerant of slow clock rise and fall times

 Fully static operation

 5 V, 10 V, and 15 V parametric ratings

 Standardized symmetrical output characteristics

 ESD protection:

 MIL-STD-883, method 3015 exceeds 2000 V

 HBM JESD22-A114F exceeds 2000 V

 MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0 )

 Complies with JEDEC standard JESD 13-B

3. Applications

 Counters and dividers

 Registers

 Toggle flip-flops

12 3 4 5 6 7...16

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