HD74HCT138P

更新时间： 2024-09-15 05:35:15

品牌	Logo	应用领域
瑞萨 - RENESAS		解码器解复用器逻辑集成电路光电二极管驱动
页数	文件大小	规格书
6页	84K
描述
3-to-8-line Decoder/Demultiplexer

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数据手册

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HD74HCT138P 数据手册

HD74HCT138

3-to-8-line Decoder/Demultiplexer

REJ03D0659–0200

(Previous ADE-205-547)

Rev.2.00

Mar 30, 2006

Description

The HD74HCT138 has 3 binary select inputs (A, B, and C). If the device is enabled these inputs determine which one

of the eight normally high outputs will go low. Two active low and one active high enables (G₁, G_2Aand G_2B) are

provided to ease the cascading of decoders.

Features

•

High Speed Operation: t_pd(A, B, C to Y) = 16.5 ns typ (C_L= 50 pF)

High Output Current: Fanout of 10 LSTTL Loads

Wide Operating Voltage: V_CC= 2 V to 6 V

Low Input Current: 1 µA max

Low Quiescent Supply Current: I_CC(static) = 4 µA max (Ta = 25°C)

Ordering Information

Package Code

(Previous Code)

Package

Abbreviation

Taping Abbreviation

(Quantity)

Part Name

Package Type

DILP-16 pin

PRDP0016AE-B

(DP-16FV)

HD74HCT138P

—

PRSP0016 DH-B

(FP-16DAV)

HD74HCT138FPEL

SOP-16 pin (JEITA)

EL (2,000 pcs/reel)

Note: Please consult the sales office for the above package availability.

Function Table

Inputs

Outputs

Enable

Select

G₁

G_2A

G_2B

Y₀

Y₁

Y₂

Y₃

Y₄

Y₅

Y₆

Y₇

H :

High level

Low level

Irrelevant

L :

X :

Rev.2.00 Mar 30, 2006 page 1 of 5

12 3 4 5 6

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