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HD74HCT138RP PDF预览

HD74HCT138RP

更新时间: 2024-11-04 23:55:27
品牌 Logo 应用领域
其他 - ETC 逻辑集成电路光电二极管驱动
页数 文件大小 规格书
8页 49K
描述
DECODER/DEMUX|3-TO-8-LINE|HCT-CMOS|SOP|16PIN|PLASTIC

HD74HCT138RP 数据手册

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HD74HCT138  
3-to-8-line Decoder/Demultiplexer  
Description  
The HD74HCT138 has 3 binary select inputs (A, B, and C). If the device is enabled these inputs determine  
which one of the eight normally high outputs will go low. Two active low and one active high enables (G1,  
G2A and G2B) are provided to ease the cascading of decoders.  
Features  
LSTTL Output Logic Level Compatibility as well as CMOS Output Compatibility  
High Speed Operation: tpd (A, B, C to Y) = 18.5 ns typ (CL = 50 pF)  
High Output Current: Fanout of 10 LSTTL Loads  
Wide Operating Voltage: VCC = 4.5 to 5.5 V  
Low Input Current: 1 µA max  
Low Quiescent Supply Current: ICC (static) = 4 µA max (Ta = 25°C)  

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