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HD74HC238FP-EL PDF预览

HD74HC238FP-EL

更新时间: 2024-11-28 13:00:43
品牌 Logo 应用领域
瑞萨 - RENESAS 解码器解复用器
页数 文件大小 规格书
7页 99K
描述
暂无描述

HD74HC238FP-EL 数据手册

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HD74HC238  
3-to-8-line Decoder/Demultiplexer  
REJ03D0593–0200  
(Previous ADE-205-470)  
Rev.2.00  
Jan 31, 2006  
Description  
The HD74HC238 has 3 binary select inputs (A, B and C). If the device is enabled these inputs determine which one of  
the eight normally high outputs will go low. Two active low and one active high enables (G1, G2A and G2B) are  
provided to ease the cascading of decoders.  
Features  
High Speed Operation: tpd (Data to Y) = 15 ns typ (CL = 50 pF)  
High Output Current: Fanout of 10 LSTTL Loads  
Wide Operating Voltage: VCC = 2 to 6 V  
Low Input Current: 1 µA max  
Low Quiescent Supply Current: ICC (static) = 4 µA max (Ta = 25°C)  
Ordering Information  
Package Code  
(Previous Code)  
Package  
Abbreviation  
Taping Abbreviation  
(Quantity)  
Part Name  
HD74HC238P  
Package Type  
DILP-16 pin  
PRDP0016AE-B  
(DP-16FV)  
P
PRSP0016DH-B  
(FP-16DAV)  
HD74HC238FPEL SOP-16 pin (JEITA)  
HD74HC238RPEL SOP-16 pin (JEDEC)  
FP  
RP  
EL (2,000 pcs/reel)  
EL (2,500 pcs/reel)  
PRSP0016DG-A  
(FP-16DNV)  
Note: Please consult the sales office for the above package availability.  
Function Table  
Inputs  
Outputs  
Y3  
Enable  
Select  
G1  
X
G2A  
X
G2B  
H
X
X
L
C
X
X
X
L
B
X
X
X
L
A
X
X
X
L
Y0  
L
L
L
H
L
L
L
L
L
L
L
Y1  
L
L
L
L
H
L
L
L
L
L
L
Y2  
L
L
L
L
L
H
L
L
L
L
L
Y4  
L
L
L
L
L
L
L
H
L
L
L
Y5  
L
L
L
L
L
L
L
L
H
L
L
Y6  
L
L
L
L
L
L
L
L
L
H
L
Y7  
L
L
L
L
L
L
L
L
L
L
H
L
L
L
L
L
L
H
L
L
L
L
X
H
L
X
H
H
H
H
H
H
H
H
L
L
L
L
L
H
L
L
L
L
H
H
L
L
L
L
H
L
L
L
H
H
H
H
L
L
L
L
H
L
L
H
H
L
L
H
H :  
High level  
Low level  
Irrelevant  
L :  
X :  
Rev.2.00 Jan 31, 2006 page 1 of 6  

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