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HD74HC240RP PDF预览

HD74HC240RP

更新时间: 2024-11-27 23:55:27
品牌 Logo 应用领域
其他 - ETC 驱动
页数 文件大小 规格书
10页 61K
描述
BUFFER/DRIVER|DUAL|4-BIT|HC-CMOS|SOP|20PIN|PLASTIC

HD74HC240RP 数据手册

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HD74HC240  
Octal Buffers/Line Drivers/Line Receivers  
(with inverted 3-state outputs)  
Description  
The HD74HC240 is an inverting buffer and has two active low enables (1G and 2G). Each enable  
independently controls 4 buffers. This device does not have schmitt trigger inputs.  
Features  
High Speed Operation: tpd = 10 ns typ (CL = 50 pF)  
High Output Current: Fanout of 15 LSTTL Loads  
Wide Operating Voltage: VCC = 2 to 6 V  
Low Input Current: 1 µA max  
Low Quiescent Supply Current: ICC (static) = 4 µA max (Ta = 25°C)  
Function Table  
Inputs  
Output  
G
H
L
A
X
H
L
Y
Z
L
L
H
H :  
high level  
low level  
irrelevant  
L
X
Z
:
:
:
off (high-impedance) state of a 3-state output  

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