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HD74HC238RP PDF预览

HD74HC238RP

更新时间: 2024-11-28 21:06:35
品牌 Logo 应用领域
日立 - HITACHI 驱动光电二极管逻辑集成电路
页数 文件大小 规格书
9页 48K
描述
Decoder/Driver, HC/UH Series, True Output, CMOS, PDSO16, FP-16DN

HD74HC238RP 数据手册

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HD74HC238  
3-to-8-line Decoder/Demultiplexer  
Description  
The HD74HC238 has 3 binary select inputs (A, B and C). If the device is enabled these inputs determine  
which one of the eight normally high outputs will go low. Two active low and one active high enables (G1,  
G2A and G2B) are provided to ease the cascading of decoders.  
Features  
High Speed Operation: tpd (Data to Y) = 15 ns typ (CL = 50 pF)  
High Output Current: Fanout of 10 LSTTL Loads  
Wide Operating Voltage: VCC = 2 to 6 V  
Low Input Current: 1 µA max  
Low Quiescent Supply Current: ICC (static) = 4 µA max (Ta = 25°C)  
Function Table  
Inputs  
Enable  
Select  
Outputs  
G1  
X
X
L
G2A  
X
H
X
L
G2B  
H
X
X
L
C
X
X
X
L
B
X
X
X
L
A
X
X
X
L
Y0  
L
L
L
H
L
L
L
L
L
L
L
Y1  
Y2  
L
L
L
L
L
H
L
L
L
L
L
Y3  
L
L
L
L
L
L
H
L
L
L
L
Y4  
L
L
L
L
L
L
L
H
L
L
L
Y5  
L
L
L
L
L
L
L
L
H
L
L
Y6  
L
L
L
L
L
L
L
L
L
H
L
Y7  
L
L
L
L
L
L
L
L
L
L
H
L
L
L
L
H
L
L
L
L
L
L
H
H
H
H
H
H
H
H
L
L
L
L
H
L
L
L
L
H
H
L
L
L
L
H
L
L
L
H
H
H
H
L
L
L
H
L
L
L
H
H
L
L
H

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