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HD74HC238RP-EL PDF预览

HD74HC238RP-EL

更新时间: 2024-11-28 13:08:15
品牌 Logo 应用领域
瑞萨 - RENESAS 解码器解复用器
页数 文件大小 规格书
7页 99K
描述
HC/UH SERIES, OTHER DECODER/DRIVER, TRUE OUTPUT, PDSO16, SOP-16

HD74HC238RP-EL 技术参数

是否无铅:含铅是否Rohs认证:不符合
生命周期:Active零件包装代码:SOIC
包装说明:SOP,针数:16
Reach Compliance Code:compliant风险等级:5.09
Is Samacsys:N其他特性:3 ENABLE INPUTS
系列:HC/UHJESD-30 代码:R-PDSO-G16
长度:9.9 mm逻辑集成电路类型:OTHER DECODER/DRIVER
湿度敏感等级:1功能数量:1
端子数量:16最高工作温度:85 °C
最低工作温度:-40 °C输出极性:TRUE
封装主体材料:PLASTIC/EPOXY封装代码:SOP
封装形状:RECTANGULAR封装形式:SMALL OUTLINE
峰值回流温度(摄氏度):225传播延迟(tpd):38 ns
认证状态:Not Qualified座面最大高度:1.75 mm
最大供电电压 (Vsup):6 V最小供电电压 (Vsup):2 V
标称供电电压 (Vsup):5 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子形式:GULL WING端子节距:1.27 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:3.9 mmBase Number Matches:1

HD74HC238RP-EL 数据手册

 浏览型号HD74HC238RP-EL的Datasheet PDF文件第2页浏览型号HD74HC238RP-EL的Datasheet PDF文件第3页浏览型号HD74HC238RP-EL的Datasheet PDF文件第4页浏览型号HD74HC238RP-EL的Datasheet PDF文件第5页浏览型号HD74HC238RP-EL的Datasheet PDF文件第6页浏览型号HD74HC238RP-EL的Datasheet PDF文件第7页 
HD74HC238  
3-to-8-line Decoder/Demultiplexer  
REJ03D0593–0200  
(Previous ADE-205-470)  
Rev.2.00  
Jan 31, 2006  
Description  
The HD74HC238 has 3 binary select inputs (A, B and C). If the device is enabled these inputs determine which one of  
the eight normally high outputs will go low. Two active low and one active high enables (G1, G2A and G2B) are  
provided to ease the cascading of decoders.  
Features  
High Speed Operation: tpd (Data to Y) = 15 ns typ (CL = 50 pF)  
High Output Current: Fanout of 10 LSTTL Loads  
Wide Operating Voltage: VCC = 2 to 6 V  
Low Input Current: 1 µA max  
Low Quiescent Supply Current: ICC (static) = 4 µA max (Ta = 25°C)  
Ordering Information  
Package Code  
(Previous Code)  
Package  
Abbreviation  
Taping Abbreviation  
(Quantity)  
Part Name  
HD74HC238P  
Package Type  
DILP-16 pin  
PRDP0016AE-B  
(DP-16FV)  
P
PRSP0016DH-B  
(FP-16DAV)  
HD74HC238FPEL SOP-16 pin (JEITA)  
HD74HC238RPEL SOP-16 pin (JEDEC)  
FP  
RP  
EL (2,000 pcs/reel)  
EL (2,500 pcs/reel)  
PRSP0016DG-A  
(FP-16DNV)  
Note: Please consult the sales office for the above package availability.  
Function Table  
Inputs  
Outputs  
Y3  
Enable  
Select  
G1  
X
G2A  
X
G2B  
H
X
X
L
C
X
X
X
L
B
X
X
X
L
A
X
X
X
L
Y0  
L
L
L
H
L
L
L
L
L
L
L
Y1  
L
L
L
L
H
L
L
L
L
L
L
Y2  
L
L
L
L
L
H
L
L
L
L
L
Y4  
L
L
L
L
L
L
L
H
L
L
L
Y5  
L
L
L
L
L
L
L
L
H
L
L
Y6  
L
L
L
L
L
L
L
L
L
H
L
Y7  
L
L
L
L
L
L
L
L
L
L
H
L
L
L
L
L
L
H
L
L
L
L
X
H
L
X
H
H
H
H
H
H
H
H
L
L
L
L
L
H
L
L
L
L
H
H
L
L
L
L
H
L
L
L
H
H
H
H
L
L
L
L
H
L
L
H
H
L
L
H
H :  
High level  
Low level  
Irrelevant  
L :  
X :  
Rev.2.00 Jan 31, 2006 page 1 of 6  

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