Datasheet > HCPL-7721-020E

HCPL-7721-020E

更新时间： 2024-11-04 12:06:59

品牌	Logo	应用领域
安华高科 - AVAGO		光电输出元件
页数	文件大小	规格书
18页	292K
描述
40 ns Propagation Delay, CMOS Optocoupler

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中文翻译

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数据手册

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HCPL-7721-020E 数据手册

HCPL-0720, HCPL-7720, HCPL-0721 and HCPL-7721

40 ns Propagation Delay, CMOS Optocoupler

Data Sheet

Lead (Pb) Free

RoHS 6 fully

compliant

RoHS 6 fully compliant options available;

-xxxE denotes a lead-free product

Description

Features

• +5 V CMOS compatibility

• 20 ns maximum prop. delay skew

• High speed: 25 MBd

• 40 ns max. prop. delay

• 10 kV/µs minimum common mode rejection

• –40 to 85°C temperature range

Available in either an 8-pin DIP or SO-8 package style

respectively, the HCPL-772X or HCPL-072X optocouplers

utilize the latest CMOS IC technology to achieve out-

standing performance with very low power consump-

tion. The HCPL-772X/072X require only two bypass ca-

pacitors for complete CMOS compatability.

Basic building blocks of the HCPL-772X/072X are a CMOS

LED driver IC, a high speed LED and a CMOS detector

IC. A CMOS logic input signal controls the LED driver IC

which supplies current to the LED. The detector IC incor-

porates an integrated photodiode, a high-speed tran-

simpedance ampliﬁer, and a voltage comparator with an

output driver.

• Safety and regulatory approvals

UL recognized

– 3750 V_rmsfor 1 min. per UL 1577

– 5000 V_rmsfor 1 min. per UL 1577

(for HCPL-772X option 020)

CSA component acceptance notice #5

IEC/EN/DIN EN 60747-5-5

– V_IORM= 630 V_peakfor HCPL-772X option 060

– V_IORM= 567 V_peakfor HCPL-072X option 060

Functional Diagram

**V

DD2

DD1

Applications

• Digital ﬁeldbus isolation: CC-Link, DeviceNet, Proﬁ-

bus, SDS

NC*

• AC plasma display panel level shifting

• Multiplexed data transmission

• Computer peripheral interface

• Microprocessor system interface

LED1

GND

SHIELD

Pin 3 is the anode of the internal LED and must be left unconnected

for guaranteed data sheet performance. Pin 7 is not connected

internally.

** A 0.1 µF bypass capacitor must be connected between pins 1 and

4, and 5 and 8.

TRUTH TABLE

POSITIVE LOGIC

V_I

LED1

OFF

V_oOUTPUT

CAUTION: It is advised that normal static precautions be taken in handling and assembly

of this component to prevent damage and/or degradation which may be induced by ESD.

12 3 4 5 6 7...18

中文翻译

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与HCPL-7721-020E相关器件

型号	品牌	获取价格	描述	数据表
HCPL-7721-060E	AVAGO	获取价格	40 ns Propagation Delay, CMOS Optocoupler
HCPL-7721-300E	AVAGO	获取价格	40 ns Propagation Delay, CMOS Optocoupler
HCPL-7721-320E	AVAGO	获取价格	40 ns Propagation Delay, CMOS Optocoupler
HCPL-7721-360E	AVAGO	获取价格	40 ns Propagation Delay, CMOS Optocoupler
HCPL-7721-500	AVAGO	获取价格	1 CHANNEL LOGIC OUTPUT OPTOCOUPLER, 25 Mbps, 0.300 INCH, LEAD FREE, SURFACE MOUNT, DIP-8
HCPL-7721-500	AGILENT	获取价格	Logic IC Output Optocoupler, 1-Element, 3750V Isolation, 0.300 INCH, SURFACE MOUNT, DIP-8
HCPL-7721-500E	AVAGO	获取价格	40 ns Propagation Delay, CMOS Optocoupler
HCPL-7721-500E	AGILENT	获取价格	Logic IC Output Optocoupler, 1-Element, 3750V Isolation, 0.300 INCH, LEAD FREE, SURFACE MO
HCPL-7721-520	AVAGO	获取价格	40 ns Propagation Delay, CMOS Optocoupler
HCPL-7721-520E	AVAGO	获取价格	40 ns Propagation Delay, CMOS Optocoupler

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