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HCPL-7721-500 PDF预览

HCPL-7721-500

更新时间: 2024-11-04 19:58:03
品牌 Logo 应用领域
安捷伦 - AGILENT 输出元件光电
页数 文件大小 规格书
18页 437K
描述
Logic IC Output Optocoupler, 1-Element, 3750V Isolation, 0.300 INCH, SURFACE MOUNT, DIP-8

HCPL-7721-500 技术参数

是否Rohs认证:不符合生命周期:Transferred
包装说明:0.300 INCH, SURFACE MOUNT, DIP-8Reach Compliance Code:unknown
HTS代码:8541.40.80.00风险等级:5.17
Is Samacsys:N其他特性:UL RECOGNIZED
配置:SINGLE最大正向电流:0.00001 A
最大绝缘电压:3750 VJESD-609代码:e0
安装特点:THROUGH HOLE MOUNT元件数量:1
最大通态电流:0.01 A最高工作温度:85 °C
最低工作温度:-40 °C光电设备类型:LOGIC IC OUTPUT OPTOCOUPLER
最大功率耗散:0.295 W子类别:Optocoupler - Transistor Outputs
最小供电电压:4.5 V表面贴装:NO
端子面层:Tin/Lead (Sn/Pb)Base Number Matches:1

HCPL-7721-500 数据手册

 浏览型号HCPL-7721-500的Datasheet PDF文件第2页浏览型号HCPL-7721-500的Datasheet PDF文件第3页浏览型号HCPL-7721-500的Datasheet PDF文件第4页浏览型号HCPL-7721-500的Datasheet PDF文件第5页浏览型号HCPL-7721-500的Datasheet PDF文件第6页浏览型号HCPL-7721-500的Datasheet PDF文件第7页 
Agilent  
HCPL-0720/ 7720 and HCPL-0721/ 7721  
40 ns Propagation Delay,  
CMOS Optocoupler  
Data Sheet  
Features  
+5 V CMOS compatibility  
• 20 ns maximum prop. delay skew  
High speed: 25 MBd  
Description  
Basic building blocks of the  
HCPL-772X/072X are a CMOS  
LED driver IC, a high speed LED  
and a CMOS detector IC. A CMOS  
logic input signal controls the  
LED driver IC which supplies  
current to the LED. The detector  
IC incorporates an integrated  
photodiode, a high-speed  
• 40 ns max. prop. delay  
Available in either an 8-pin DIP or  
SO-8 package style respectively, the  
HCPL-772X or HCPL-072X  
optocouplers utilize the latest  
CMOS IC technology to achieve  
outstanding performance with very  
low power consumption. The  
HCPL-772X/072X require only two  
bypass capacitors for complete  
CMOS compatability.  
• 10 kV/ µs minimum common mode  
rejection  
• –40 to 85°C temperature range  
• Safety and regulatory approvals  
UL recognized  
3750 V rms for 1 min. per  
UL 1577  
transimpedance amplifier, and a  
voltage comparator with an  
output driver.  
CSA component acceptance  
notice # 5  
IEC/ EN/ DIN EN 60747-5-2  
VIORM = 630 Vpeak for  
HCPL-772X option 060  
Functional Diagram  
VIORM = 560 Vpeak for  
HCPL-072X option 060  
TRUTH TABLE  
(POSITIVE LOGIC)  
**V  
1
2
8
7
V
**  
DD1  
DD2  
Applications  
V , INPUT  
I
LED1  
V
, OUTPUT  
O
H
L
OFF  
ON  
H
L
Digital fieldbus isolation: CC-Link,  
DeviceNet, Profibus, SDS  
V
I
NC*  
I
O
AC plasma display panel level  
shifting  
3
4
6
5
*
V
O
LED1  
• Multiplexed data transmission  
Computer peripheral interface  
• Microprocessor system interface  
GND  
GND  
2
1
SHIELD  
* Pin 3 is the anode of the internal LED and must be left unconnected for  
guaranteed data sheet performance. Pin 7 is not connected internally.  
**A 0.1 µF bypass capacitor must be connected between pins 1 and 4, and  
5 and 8.  
CAUTION: It is advised that normal static precautions be taken in handling and assembly of this  
component to prevent damage and/or degradation which may be induced by ESD.  

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