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HCPL-7721-300E PDF预览

HCPL-7721-300E

更新时间: 2024-11-24 12:06:59
品牌 Logo 应用领域
安华高科 - AVAGO 光电
页数 文件大小 规格书
18页 292K
描述
40 ns Propagation Delay, CMOS Optocoupler

HCPL-7721-300E 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Active包装说明:0.300 INCH, LEAD FREE, SURFACE MOUNT, DIP-8
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8541.40.80.00Factory Lead Time:26 weeks
风险等级:5.23其他特性:UL RECOGNIZED, VDE APPROVED
配置:COMPLEX标称数据速率:25 MBps
最大正向电流:0.00001 A最大绝缘电压:3750 V
JESD-609代码:e3安装特点:SURFACE MOUNT
元件数量:1最大通态电流:0.01 A
最高工作温度:85 °C最低工作温度:-40 °C
光电设备类型:LOGIC IC OUTPUT OPTOCOUPLER标称响应时间:4e-8 ns
子类别:Optocoupler - IC Outputs最小供电电压:4.5 V
标称供电电压:5.5 V表面贴装:YES
端子面层:Matte Tin (Sn)Base Number Matches:1

HCPL-7721-300E 数据手册

 浏览型号HCPL-7721-300E的Datasheet PDF文件第2页浏览型号HCPL-7721-300E的Datasheet PDF文件第3页浏览型号HCPL-7721-300E的Datasheet PDF文件第4页浏览型号HCPL-7721-300E的Datasheet PDF文件第5页浏览型号HCPL-7721-300E的Datasheet PDF文件第6页浏览型号HCPL-7721-300E的Datasheet PDF文件第7页 
HCPL-0720, HCPL-7720, HCPL-0721 and HCPL-7721  
40 ns Propagation Delay, CMOS Optocoupler  
Data Sheet  
Lead (Pb) Free  
RoHS 6 fully  
compliant  
RoHS 6 fully compliant options available;  
-xxxE denotes a lead-free product  
Description  
Features  
+5 V CMOS compatibility  
20 ns maximum prop. delay skew  
High speed: 25 MBd  
40 ns max. prop. delay  
10 kV/µs minimum common mode rejection  
–40 to 85°C temperature range  
Available in either an 8-pin DIP or SO-8 package style  
respectively, the HCPL-772X or HCPL-072X optocouplers  
utilize the latest CMOS IC technology to achieve out-  
standing performance with very low power consump-  
tion. The HCPL-772X/072X require only two bypass ca-  
pacitors for complete CMOS compatability.  
Basic building blocks of the HCPL-772X/072X are a CMOS  
LED driver IC, a high speed LED and a CMOS detector  
IC. A CMOS logic input signal controls the LED driver IC  
which supplies current to the LED. The detector IC incor-  
porates an integrated photodiode, a high-speed tran-  
simpedance amplifier, and a voltage comparator with an  
output driver.  
Safety and regulatory approvals  
UL recognized  
– 3750 Vrms for 1 min. per UL 1577  
– 5000 Vrms for 1 min. per UL 1577  
(for HCPL-772X option 020)  
CSA component acceptance notice #5  
IEC/EN/DIN EN 60747-5-5  
– VIORM = 630 Vpeak for HCPL-772X option 060  
– VIORM = 567 Vpeak for HCPL-072X option 060  
Functional Diagram  
**V  
1
2
8
7
V
**  
DD2  
DD1  
Applications  
Digital fieldbus isolation: CC-Link, DeviceNet, Profi-  
bus, SDS  
V
NC*  
I
I
AC plasma display panel level shifting  
Multiplexed data transmission  
Computer peripheral interface  
Microprocessor system interface  
O
3
4
6
5
*
V
O
LED1  
GND  
GND  
2
1
SHIELD  
*
Pin 3 is the anode of the internal LED and must be left unconnected  
for guaranteed data sheet performance. Pin 7 is not connected  
internally.  
** A 0.1 µF bypass capacitor must be connected between pins 1 and  
4, and 5 and 8.  
TRUTH TABLE  
POSITIVE LOGIC  
VI  
H
L
LED1  
OFF  
ON  
Vo OUTPUT  
H
L
CAUTION: It is advised that normal static precautions be taken in handling and assembly  
of this component to prevent damage and/or degradation which may be induced by ESD.  

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