Datasheet > HCF4027B_02

HCF4027B_02

更新时间： 2024-10-27 04:56:47

品牌	Logo	应用领域
意法半导体 - STMICROELECTRONICS		触发器
页数	文件大小	规格书
9页	218K
描述
DUAL J-K MASTER SLAVE FLIP-FLOP

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中文翻译

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数据手册

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HCF4027B_02 数据手册

HCF4027B

DUAL J-K MASTER SLAVE FLIP-FLOP

■

SET RESET CAPABILITY

STATIC FLIP-FLOP OPERATION - RETAINS

STATE INDEFINETELY WITH CLOCK LEVEL

EITHER "HIGH" OR "LOW"

■

MEDIUM-SPEED OPERATION - 16MHz

(Typ. clock toggle rate at 10V)

QUIESCENT CURRENT SPECIFIED UP TO

20V

STANDARDIZED SYMMETRICAL OUTPUT

CHARACTERISTICS

5V, 10V AND 15V PARAMETRIC RATINGS

INPUT LEAKAGE CURRENT

DIP

SOP

ORDER CODES

PACKAGE

TUBE

T & R

■

DIP

HCF4027BEY

HCF4027BM1

I = 100nA (MAX) AT V = 18V T = 25°C

SOP

HCF4027M013TR

■

100% TESTED FOR QUIESCENT CURRENT

MEETS ALL REQUIREMENTS OF JEDEC

JESD13B " STANDARD SPECIFICATIONS

FOR DESCRIPTION OF B SERIES CMOS

DEVICES"

signals. Buffered Q and Q signals are provided as

outputs. This input-output arrangement provides

for compatible operation with the HCF4013B dual

D type flip-flop.

This device is useful in performing control,

at the J and K inputs, along with internal

self-steering, control the state of each flip-flop;

changes in the flip-flop state are synchronous with

the positive-going transition of the clock pulse. Set

and Reset functions are independent of the clock

and are initiated when a high level signal is

present at either the Set or Reset input.

DESCRIPTION

HCF4027B is a monolithic integrated circuit

fabricated in Metal Oxide Semiconductor

technology available in DIP and SOP packages.

HCF4027B is a single monolithic chip integrated

circuit

containing

two

J-K

identical

master-slave

complementary-symmetry

flip-flops. Each flip-flop has provisions for

individual J, K, Set, Reset, and Clock input

PIN CONNECTION

September 2002

1/9

12 3 4 5 6 7...9

中文翻译

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HCF4027BC1	STMICROELECTRONICS	获取价格	DUAL-J-K MASTER-SLAVE FLIP-FLOP
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