5秒后页面跳转
捷配首页

Datasheet > 存储 > SRAM> GS8640Z18GT-300
GS8640Z18GT-300 PDF预览

GS8640Z18GT-300

更新时间： 2024-11-13 04:56:23
品牌 Logo 应用领域
GSI 存储内存集成电路静态存储器
页数 文件大小 规格书
25页 1035K
描述
72Mb Pipelined and Flow Through Synchronous NBT SRAM

阅读下载

中文翻译

获取价格

GS8640Z18GT-300 技术参数

是否无铅：不含铅是否Rohs认证：符合
生命周期：Active零件包装代码：QFP
包装说明：LQFP,针数：100
Reach Compliance Code：compliantECCN代码：3A991.B.2.B
HTS代码：8542.32.00.41Factory Lead Time：8 weeks
风险等级：5.32Is Samacsys：N
最长访问时间：5.5 ns其他特性：FLOW-THROUGH OR PIPELINED ARCHITECTURE; ALSO OPERATES AT 3.3V SUPPLY
JESD-30 代码：R-PQFP-G100JESD-609代码：e3
长度：20 mm内存密度：75497472 bit
内存集成电路类型：ZBT SRAM内存宽度：18
湿度敏感等级：3功能数量：1
端子数量：100字数：4194304 words
字数代码：4000000工作模式：SYNCHRONOUS
最高工作温度：70 °C最低工作温度：
组织：4MX18封装主体材料：PLASTIC/EPOXY
封装代码：LQFP封装形状：RECTANGULAR
封装形式：FLATPACK, LOW PROFILE并行/串行：PARALLEL
峰值回流温度（摄氏度）：260认证状态：Not Qualified
座面最大高度：1.6 mm最大供电电压 (Vsup)：2.7 V
最小供电电压 (Vsup)：2.3 V标称供电电压 (Vsup)：2.5 V
表面贴装：YES技术：CMOS
温度等级：COMMERCIAL端子面层：PURE MATTE TIN
端子形式：GULL WING端子节距：0.65 mm
端子位置：QUAD处于峰值回流温度下的最长时间：NOT SPECIFIED
宽度：14 mmBase Number Matches：1

GS8640Z18GT-300 数据手册

 浏览型号GS8640Z18GT-300的Datasheet PDF文件第2页浏览型号GS8640Z18GT-300的Datasheet PDF文件第3页浏览型号GS8640Z18GT-300的Datasheet PDF文件第4页浏览型号GS8640Z18GT-300的Datasheet PDF文件第5页浏览型号GS8640Z18GT-300的Datasheet PDF文件第6页浏览型号GS8640Z18GT-300的Datasheet PDF文件第7页 
Product Preview  
GS8640Z18/36T-300/250/200/167  
300 MHz–167 MHz  
100-Pin TQFP  
Commercial Temp  
Industrial Temp  
72Mb Pipelined and Flow Through  
Synchronous NBT SRAM  
2.5 V or 3.3 V V  
DD  
2.5 V or 3.3 V I/O  
Because it is a synchronous device, address, data inputs, and  
read/ write control inputs are captured on the rising edge of the  
input clock. Burst order control (LBO) must be tied to a power  
rail for proper operation. Asynchronous inputs include the  
Sleep mode enable (ZZ) and Output Enable. Output Enable can  
be used to override the synchronous control of the output  
drivers and turn the RAM's output drivers off at any time.  
Write cycles are internally self-timed and initiated by the rising  
edge of the clock input. This feature eliminates complex off-  
chip write pulse generation required by asynchronous SRAMs  
and simplifies input signal timing.  
Features  
• NBT (No Bus Turn Around) functionality allows zero wait  
read-write-read bus utilization; Fully pin-compatible with  
both pipelined and flow through NtRAM™, NoBL™ and  
ZBT™ SRAMs  
• 2.5 V or 3.3 V +10%/–10% core power supply  
• 2.5 V or 3.3 V I/O supply  
• User-configurable Pipeline and Flow Through mode  
• LBO pin for Linear or Interleave Burst mode  
• Pin compatible with 4Mb, 9Mb, 18Mb and 36Mb devices  
• Byte write operation (9-bit Bytes)  
• 3 chip enable signals for easy depth expansion  
• ZZ Pin for automatic power-down  
• JEDEC-standard 100-lead TQFP package  
• RoHS-compliant 100-lead TQFP package available  
The GS8640Z18/36T may be configured by the user to operate  
in Pipeline or Flow Through mode. Operating as a pipelined  
synchronous device, meaning that in addition to the rising edge  
triggered registers that capture input signals, the device  
incorporates a rising-edge-triggered output register. For read  
cycles, pipelined SRAM output data is temporarily stored by  
the edge triggered output register during the access cycle and  
then released to the output drivers at the next rising edge of  
clock.  
Functional Description  
The GS8640Z18/36T is a 72Mbit Synchronous Static SRAM.  
GSI's NBT SRAMs, like ZBT, NtRAM, NoBL or other  
pipelined read/double late write or flow through read/single  
late write SRAMs, allow utilization of all available bus  
bandwidth by eliminating the need to insert deselect cycles  
when the device is switched from read to write cycles.  
The GS8640Z18/36T is implemented with GSI's high  
performance CMOS technology and is available in a JEDEC-  
standard 100-pin TQFP package.  
Parameter Synopsis  
-300  
-250  
-200  
-167  
Unit  
t
2.3  
3.3  
2.5  
4.0  
3.0  
5.0  
3.5  
6.0  
ns  
ns  
KQ  
Pipeline  
3-1-1-1  
tCycle  
Curr (x18)  
Curr (x32/x36)  
400  
480  
340  
410  
290  
350  
260  
305  
mA  
mA  
t
5.5  
5.5  
6.5  
6.5  
7.5  
7.5  
8.0  
8.0  
ns  
ns  
KQ  
Flow  
Through  
2-1-1-1  
tCycle  
Curr (x18)  
Curr (x32/x36)  
285  
330  
245  
280  
220  
250  
210  
240  
mA  
mA  
*All GSI Technology packages are at least 5/6 RoHS compliant.  
Packages listed with the additional “G” designator are 6/6 RoHS compliant.  
Rev: 1.01 1/2006  
1/25  
© 2004, GSI Technology  
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.  
1234567...25

中文翻译

下载PDF

与GS8640Z18GT-300相关器件

型号 品牌 获取价格 描述 数据表
GS8640Z18GT-300I GSI

获取价格

 		100 TQFP
GS8640Z18GT-300IT GSI

获取价格

 		暂无描述
GS8640Z18RT-250M GSI

获取价格

 		100 TQFP
GS8640Z18RT-333M GSI

获取价格

 		100 TQFP
GS8640Z18T GSI

获取价格

 		72Mb Pipelined and Flow Through Synchronous NBT SRAM
GS8640Z18T-167 GSI

获取价格

 		72Mb Pipelined and Flow Through Synchronous NBT SRAM
GS8640Z18T-167I GSI

获取价格

 		72Mb Pipelined and Flow Through Synchronous NBT SRAM
GS8640Z18T-167IT GSI

获取价格

 		ZBT SRAM, 4MX18, 8ns, CMOS, PQFP100, TQFP-100
GS8640Z18T-167IV GSI

获取价格

 		72Mb Pipelined and Flow Through Synchronous NBT SRAM
GS8640Z18T-167IVT GSI

获取价格

 		ZBT SRAM, 4MX18, 8ns, CMOS, PQFP100, TQFP-100

与GS8640Z18GT-300相关文章

您还可以找


热门产品
PCB打样/小批量
铝基板
BOM智能配单
PCBA制造
钣金
精密CNC
模具注塑
薄膜开关
精选活动
PCBA打样特惠
四六层板品质升级
铝基板品质升级
一体化电子制造
DFM下载
服务支持
企业认证
产品展示
工厂展示
工艺能力
积分商城
关于捷配
捷配简介
企业文化
公司动态
人才招聘
联系我们
帮助中心
下单流程
付款流程
开票流程
常见问题
全球PCB制造服务专线 400-613-0088

工作时间：9:00-21:00

CEO邮箱：ceo@jiepei.com

投诉邮箱：tousu@jiepei.com

捷配网-微信公众号 微信公众号
捷配网-微信公众号 抖音公众号
资质认证：
合作快递：
支付方式：
Copyright © 2024 Jiepei.com Inc. All Rights Reserved. 版权所有:杭州捷配信息科技有限公司 浙公网安备 33010502006866号 浙ICP备10014259号-119 营业执照ICP证