GM76C256CL/LL
LG Semicon Co.,Ltd.
32,768 WORDS x 8 BIT
CMOS STATIC RAM
Description
Pin Configuration
The GM76C256C family is a 262,144 bits static
random access memory organized as 32,768 words
by 8 bits. Using a 0.6um advanced CMOS tech-
1
28
27
A14
VCC
2
3
4
5
6
A12
A7
/WE
nology and operated a single 5.0V supply.
.
26 A13
Advanced circuit techniques provide both high
speed and low power consumption. The Family
can support various operating temerature ranges
25
A6
A5
A4
A3
A2
A1
A0
A8
24
A9
23
A11
for user flexibility of system design.
.
7
8
22 /OE
21 A10
20 /CS
The Family has Chip select /CS, which allows for
device selection and data retention control, and
output enable (/OE), which provides fast memory
access. Thus it is suitable for high speed and low
power applications, particularly where battery
9
10
19
I/O7
I/O0 11
18 I/O6
back-up is required.
.
12
17
I/O1
I/O5
I/O2 13
VSS 14
16 I/O4
15 I/O3
Features
* High Speed : Fast Access and Cycle Time
55/70ns Max
(Top View)
* Low Power Standby and Low Power Operation
-Standby : 165uW at TA= -25 ~ 85C (LLE)
110uW at TA= 0 ~ 70C (LL)
Block Diagram
-Operation : 385mW at Vcc=5.0V + 0.5V
* Completely Static RAM : No Clock or Timing
strobe required
* Power Supply Voltage : 5.0V + 0.5V
* Low Data Retention Voltage : 2.0V(Min)
* Temperature Range
A0
A1
A2
MEMORY CELL ARRAY
512 x 64 x 8
9
512
X
Decoder
(32K x 8)
Address
Buffer
-GM76C256CL/LL
: ( 0 ~ 70C)
-GM76C256CLE/LLE : (-25 ~ 85C)
* Package Type : JEDEC Standard
28-DIP,SOP,TSOP(I)
64 x 8
6
64
A13
Y
Column Select
A14
Decoder
Pin Description
8
Pin
A0-A14
/WE
Function
Address Inputs
Write Enable Input
Output Enable Input
Chip Select Input
Data Input/Output
Power Supply
Chip
Control
/CS
/OE
I/O
Control
/WE
I/O Buffer
/OE
/CS
I/O0-I/O7
VCC
VSS
Ground
33