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GM76C256CLLT-55/E PDF预览

GM76C256CLLT-55/E

更新时间: 2024-11-07 15:33:07
品牌 Logo 应用领域
海力士 - HYNIX ISM频段静态存储器光电二极管内存集成电路
页数 文件大小 规格书
9页 80K
描述
Standard SRAM, 32KX8, 55ns, CMOS, PDSO28, TSOP1-28

GM76C256CLLT-55/E 技术参数

生命周期:Obsolete零件包装代码:TSOP
包装说明:TSOP1, TSSOP28,.53,22针数:28
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.32.00.41风险等级:5.59
最长访问时间:55 nsI/O 类型:COMMON
JESD-30 代码:R-PDSO-G28JESD-609代码:e6
长度:11.8 mm内存密度:262144 bit
内存集成电路类型:STANDARD SRAM内存宽度:8
功能数量:1端子数量:28
字数:32768 words字数代码:32000
工作模式:ASYNCHRONOUS最高工作温度:85 °C
最低工作温度:-25 °C组织:32KX8
输出特性:3-STATE封装主体材料:PLASTIC/EPOXY
封装代码:TSOP1封装等效代码:TSSOP28,.53,22
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, THIN PROFILE
并行/串行:PARALLEL电源:5 V
认证状态:Not Qualified座面最大高度:1.2 mm
最小待机电流:2 V子类别:SRAMs
最大压摆率:0.07 mA最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):4.5 V标称供电电压 (Vsup):5 V
表面贴装:YES技术:CMOS
温度等级:OTHER端子面层:TIN BISMUTH
端子形式:GULL WING端子节距:0.55 mm
端子位置:DUAL宽度:8 mm
Base Number Matches:1

GM76C256CLLT-55/E 数据手册

 浏览型号GM76C256CLLT-55/E的Datasheet PDF文件第2页浏览型号GM76C256CLLT-55/E的Datasheet PDF文件第3页浏览型号GM76C256CLLT-55/E的Datasheet PDF文件第4页浏览型号GM76C256CLLT-55/E的Datasheet PDF文件第5页浏览型号GM76C256CLLT-55/E的Datasheet PDF文件第6页浏览型号GM76C256CLLT-55/E的Datasheet PDF文件第7页 
GM76C256CL/LL  
32,768 WORDS x 8 BIT  
CMOS STATIC RAM  
Description  
Pin Configuration  
The GM76C256C family is a 262,144 bits static  
random access memory organized as 32,768 words  
by 8 bits. Using a 0.6um advanced CMOS tech-  
1
28  
A14  
A12  
A7  
VCC  
/WE  
A13  
A8  
2
3
4
5
6
27  
26  
25  
24  
23  
nology and operated a single 5.0V supply.  
.
Advanced circuit techniques provide both high  
speed and low power consumption. The Family  
can support various operating temerature ranges  
A6  
A5  
A9  
A4  
A11  
for user flexibility of system design.  
.
7
8
22  
21  
A3  
A2  
/OE  
A10  
/CS  
The Family has Chip select /CS, which allows for  
device selection and data retention control, and  
output enable (/OE), which provides fast memory  
access. Thus it is suitable for high speed and low  
power applications, particularly where battery  
9
20  
19  
18  
A1  
10  
11  
A0  
I/O7  
I/O6  
I/O0  
back-up is required.  
.
12  
13  
17  
16  
I/O1  
I/O2  
I/O5  
I/O4  
Features  
14  
15  
VSS  
I/O3  
* High Speed : Fast Access and Cycle Time  
55/70ns Max  
(Top View)  
* Low Power Standby and Low Power Operation  
-Standby : 165uW at TA= -25 ~ 85C (LLE)  
110uW at TA= 0 ~ 70C (LL)  
Block Diagram  
-Operation : 385mW at Vcc=5.0V + 0.5V  
* Completely Static RAM : No Clock or Timing  
strobe required  
* Power Supply Voltage : 5.0V + 0.5V  
* Low Data Retention Voltage : 2.0V(Min)  
* Temperature Range  
-GM76C256CL/LL : ( 0 ~ 70C)  
-GM76C256CLE/LLE : (-25 ~ 85C)  
* Package Type : JEDEC Standard 28 SOP,TSOP(I)  
A0  
A1  
A2  
MEMORY CELL ARRAY  
512 x 64 x 8  
9
512  
X
Decoder  
(32K x 8)  
Address  
Buffer  
64 x 8  
6
64  
A13  
Y
Column Select  
A14  
Decoder  
Pin Description  
8
Pin  
A0-A14  
/WE  
Function  
Address Inputs  
Write Enable Input  
Output Enable Input  
Chip Select Input  
Data Input/Output  
Power Supply  
Chip  
Control  
/CS  
/OE  
I/O  
Control  
/WE  
I/O Buffer  
/OE  
/CS  
I/O0-I/O7  
VCC  
VSS  
Ground  
33  

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