Datasheet > GAL22LV10

GAL22LV10

更新时间： 2024-11-10 04:19:19

品牌	Logo	应用领域
莱迪思 - LATTICE		/
页数	文件大小	规格书
18页	218K
描述
Low Voltage E2CMOS PLD Generic Array Logic⑩

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中文翻译

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数据手册

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GAL22LV10 数据手册

GAL22LV10

Low Voltage E²CMOS PLD

Generic Array Logic™

FUNCTIONAL BLOCK DIAGRAM

FEATURES

• HIGH PERFORMANCE E²CMOS^®TECHNOLOGY

— 4 ns Maximum Propagation Delay

— Fmax = 250 MHz

RESET

I/CLK

— 3 ns Maximum from Clock Input to Data Output

OLMC

I/O/Q

— UltraMOS^®Advanced CMOS Technology

• 3.3V LOW VOLTAGE 22V10 ARCHITECTURE

— JEDEC-Compatible 3.3V Interface Standard

— 5V Compatible Inputs

— I/O Interfaces with Standard 5V TTL Devices

(GAL22LV10C)

I/O/Q

• ACTIVE PULL-UPS ON ALL PINS (GAL22LV10D)

• E²CELL TECHNOLOGY

— Reconfigurable Logic

— Reprogrammable Cells

— 100% Tested/100% Yields

— High Speed Electrical Erasure (<100ms)

— 20 Year Data Retention

I/O/Q

• TEN OUTPUT LOGIC MACROCELLS

— Maximum Flexibility for Complex Logic Designs

— Programmable Output Polarity

I/O/Q

• PRELOAD AND POWER-ON RESET OF ALL REGISTERS

— 100% Functional Testability

• APPLICATIONS INCLUDE:

— Glue Logic for 3.3V Systems

— DMA Control

— State Machine Control

— High Speed Graphics Processing

— Standard Logic Speed Upgrade

• ELECTRONIC SIGNATURE FOR IDENTIFICATION

DESCRIPTION

PRESET

The GAL22LV10D, at 4 ns maximum propagation delay time,

provides the highest speed performance available in the PLD

market. The GAL22LV10C can interface with both 3.3V and 5V

signal levels. The GAL22LV10 is manufactured using Lattice

Semiconductor's advanced 3.3V E²CMOS process, which com-

bines CMOS with Electrically Erasable (E²) floating gate technol-

ogy. High speed erase times (<100ms) allow the devices to be

reprogrammed quickly and efficiently.

PIN CONFIGURATION

PLCC

I/O/Q

The generic architecture provides maximum design flexibility by

allowing the Output Logic Macrocell (OLMC) to be configured by

the user.

GAL22LV10

Top View

Unique test circuitry and reprogrammable cells allow complete

AC, DC, and functional testing during manufacture. As a result,

Lattice Semiconductor delivers 100% field programmability and

functionality of all GAL products. In addition, 100 erase/write

cycles and data retention in excess of 20 years are specified.

I/O/Q

to change without notice.

LATTICE SEMICONDUCTOR CORP., 5555 Northeast Moore Ct., Hillsboro, Oregon 97124, U.S.A.

Tel. (503) 681-0118; 1-888-ISP-PLDS; FAX (503) 681-3037; http://www.latticesemi.com

July 1997

22lv10_03

12 3 4 5 6 7...18

中文翻译

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与GAL22LV10相关器件

型号	品牌	获取价格	描述	数据表
GAL22LV10C-10LJ	LATTICE	获取价格	Low Voltage E2CMOS PLD Generic Array Logic⑩
GAL22LV10C-10LJN	LATTICE	获取价格	EE PLD, 10ns, PAL-Type, CMOS, PQCC28, LEAD FREE, PLASTIC, LCC-28
GAL22LV10C-15J	ETC	获取价格	IC-SM-CMOS PLD
GAL22LV10C-15LJ	LATTICE	获取价格	Low Voltage E2CMOS PLD Generic Array Logic⑩
GAL22LV10C-15LJI	ETC	获取价格	Electrically-Erasable PLD
GAL22LV10C-7LJ	LATTICE	获取价格	Low Voltage E2CMOS PLD Generic Array Logic⑩
GAL22LV10D-15LJ	LATTICE	获取价格	EE PLD, 15ns, CMOS, PQCC28, PLASTIC, LCC-28
GAL22LV10D-4LJ	LATTICE	获取价格	Low Voltage E2CMOS PLD Generic Array Logic⑩
GAL22LV10D-4LJN	LATTICE	获取价格	EE PLD, 4ns, PAL-Type, CMOS, PQCC28, LEAD FREE, PLASTIC, LCC-28
GAL22LV10D-5LJ	LATTICE	获取价格	Low Voltage E2CMOS PLD Generic Array Logic⑩

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