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FGH40N6S2D_NL

更新时间： 2024-02-02 14:05:10
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD 局域网栅瞄准线功率控制晶体管
页数 文件大小 规格书
9页 208K
描述
Insulated Gate Bipolar Transistor, 75A I(C), 600V V(BR)CES, N-Channel, TO-247, LEAD FREE PACKAGE-3

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FGH40N6S2D_NL 技术参数

生命周期：Obsolete零件包装代码：TO-247
包装说明：FLANGE MOUNT, R-PSFM-T3针数：3
Reach Compliance Code：unknown风险等级：5.71
其他特性：LOW CONDUCTION LOSS外壳连接：COLLECTOR
最大集电极电流 (IC)：75 A集电极-发射极最大电压：600 V
配置：SINGLE WITH BUILT-IN DIODEJEDEC-95代码：TO-247
JESD-30 代码：R-PSFM-T3JESD-609代码：e3
元件数量：1端子数量：3
封装主体材料：PLASTIC/EPOXY封装形状：RECTANGULAR
封装形式：FLANGE MOUNT极性/信道类型：N-CHANNEL
认证状态：Not Qualified表面贴装：NO
端子面层：MATTE TIN端子形式：THROUGH-HOLE
端子位置：SINGLE晶体管应用：POWER CONTROL
晶体管元件材料：SILICON标称断开时间 (toff)：153 ns
标称接通时间 (ton)：32 nsBase Number Matches：1

FGH40N6S2D_NL 数据手册

 浏览型号FGH40N6S2D_NL的Datasheet PDF文件第2页浏览型号FGH40N6S2D_NL的Datasheet PDF文件第3页浏览型号FGH40N6S2D_NL的Datasheet PDF文件第4页浏览型号FGH40N6S2D_NL的Datasheet PDF文件第5页浏览型号FGH40N6S2D_NL的Datasheet PDF文件第6页浏览型号FGH40N6S2D_NL的Datasheet PDF文件第7页 
July 2002  
FGH40N6S2D  
600V, SMPS II Series N-Channel IGBT with Anti-Parallel StealthTM Diode  
General Description  
Features  
The FGH40N6S2D is a Low Gate Charge, Low Plateau  
Voltage SMPS II IGBT combining the fast switching speed  
of the SMPS IGBTs along with lower gate charge, plateau  
voltage and avalanche capability (UIS). These LGC devices  
shorten delay times, and reduce the power requirement of  
the gate drive. These devices are ideally suited for high volt-  
age switched mode power supply applications where low  
conduction loss, fast switching times and UIS capability are  
essential. SMPS II LGC devices have been specially de-  
signed for:  
• 100kHz Operation at 390V, 24A  
• 200kHZ Operation at 390V, 18A  
• 600V Switching SOA Capability  
o
• Typical Fall Time. . . . . . . . . . . 85ns at TJ = 125 C  
• Low Gate Charge . . . . . . . . . 35nC at V = 15V  
GE  
• Low Plateau Voltage . . . . . . . . . . . . .6.5V Typical  
• UIS Rated . . . . . . . . . . . . . . . . . . . . . . . . . 260mJ  
• Low Conduction Loss  
•
•
•
•
•
•
Power Factor Correction (PFC) circuits  
Full bridge topologies  
Half bridge topologies  
Push-Pull circuits  
Uninterruptible power supplies  
Zero voltage and zero current switching circuits  
IGBT (co-pack) formerly Developmental Type TA49340  
Diode formerly Developmental Type TA49391  
JEDEC STYLE TO-247  
Package  
Symbol  
E
C
C
G
G
COLLECTOR  
(BOTTOM SIDE  
METAL)  
E
Device Maximum Ratings T = 25°C unless otherwise noted  
C
Symbol  
BV  
Parameter  
Collector to Emitter Breakdown Voltage  
Collector Current Continuous, T = 25°C  
Ratings  
600  
Units  
V
A
A
A
V
V
CES  
I
75  
C25  
C
I
Collector Current Continuous, T = 110°C  
35  
C110  
C
I
Collector Current Pulsed (Note 1)  
Gate to Emitter Voltage Continuous  
Gate to Emitter Voltage Pulsed  
180  
CM  
V
±20  
GES  
GEM  
V
±30  
SSOA  
Switching Safe Operating Area at T = 150°C, Figure 2  
100A at 600V  
260  
J
E
Pulsed Avalanche Energy, I = 30A, L = 1mH, V = 50V  
mJ  
W
AS  
CE  
DD  
P
Power Dissipation Total T = 25°C  
290  
D
C
Power Dissipation Derating T > 25°C  
2.33  
W/°C  
°C  
C
T
Operating Junction Temperature Range  
Storage Junction Temperature Range  
-55 to 150  
-55 to 150  
J
T
°C  
STG  
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and  
operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.  
NOTE:  
1. Pulse width limited by maximum junction temperature.  
©2002 Fairchild Semiconductor Corporation  
FGH40N6S2D RevA4  
1234567...9

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