Datasheet > F0443EVBI

F0443EVBI

更新时间： 2022-06-24 15:42:23

品牌	Logo	应用领域
瑞萨 - RENESAS		/
页数	文件大小	规格书
65页	6308K
描述
Dual Matched Broadband RF DVGA 0.6GHz to 2.7GHz

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F0443EVBI 数据手册

F0443 Datasheet

Pin Number

Name

RDSET2

VCC

Description

Connect 13kΩ external resistor to GND to optimize amplifier bias. Used with RSET2 pin 32.

DC supply voltage. Connect bypass capacitor(s) as close to the pin as possible.

RSET2

Connect 2.94kΩ external resistor to GND to optimize amplifier bias. Used with RDSET2 pin 29.

Channel A bias circuitry DC supply voltage. Connect bypass capacitor(s) as close to the pin as possible.

Channel A RF output internally matched to 50Ω. Must use external DC block.

V_CC_BIAS_A

RFOUT_A

Logic control bit 1 for channel B DSA3. An internal pull-up resistor network connects between this pin and

1.67V.

DSA3_A_BIT1

DSA3_A_BIT0

Logic control bit 0 for channel B DSA3. An internal pull-up resistor network connects between this pin and

1.67V.

V_CC_AMP2_A

RFET_A

Channel A amplifier 2 DC supply voltage. Connect bypass capacitor(s) as close to the pin as possible.

Connect 4.7kΩ external resistor to GND to optimize amplifier gain variation over temperature.

Connect 9.1kΩ external resistor to GND to optimize amplifier bias. Used with RSET1_A pin 44.

Connect 2.67kΩ external resistor to GND to optimize amplifier bias. Used with RDSET1_A pin 43.

Channel A Amplifier 1 DC supply voltage. Connect bypass capacitor(s) as close to the pin as possible.

RDSET1_A

RSET1_A

V_CC_AMP1_A

Logic control for channel A DSA1. Logic HIGH/Open = 6dB attenuation, logic LOW = 0dB attenuation. An

internal pull-up resistor network connects between this pin and 1.67V.

DSA1_A

– EPAD

Exposed paddle. Internally connected to ground. Solder this exposed paddle to a printed circuit board

(PCB) pad that uses multiple ground vias to provide heat transfer out of the device into the PCB ground

planes. These multiple ground vias are also required to achieve the specified RF performance.

September 1, 2020

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