Datasheet > F0443EVBI

F0443EVBI

更新时间： 2022-06-24 15:42:23

品牌	Logo	应用领域
瑞萨 - RENESAS		/
页数	文件大小	规格书
65页	6308K
描述
Dual Matched Broadband RF DVGA 0.6GHz to 2.7GHz

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F0443EVBI 数据手册

F0443 Datasheet

Pin Descriptions

Table 1.

Pin Descriptions

Pin Number

Name

Description

RFIN_A

Channel A RF input internally matched to 50Ω. Must use external DC block.

2, 11, 13,

15, 20, 22,

25, 27, 30,

34, 36, 39,

41, 46, 48

GND

Internally grounded. This pin must be grounded with a via as close to the pin as possible.

Logic control to select between SPI or I3C mode. Logic HIGH = I3C slave mode using a ‘Slave-Lite’

version of the MIPI I3C communication protocol. Logic LOW/Open = SPI slave mode. An internal pull-

down resistor of 100kΩ connects between this pin and GND.

SPI_I3C_SEL

Standby control for Channel A. HIGH/Open = device power OFF with SPI/I3C still powered ON, LOW =

device power ON. An internal pull-up resistor network connects between this pin and 1.67V.

STBY_A

CSb

Chip Select bar input. Used only for SPI mode. Logic LOW allows data to be shifted in. Logic HIGH

updates the programming register.

DATA/SDA

CLK/SCL

SPI slave data in or I3C data in/out.

SPI/I3C clock input.

Bit 0 for the I3C static address or used for adding static addressing capability in SPI mode. See the

ID_0

ID_1

Programming section for details. An internal pull-down resistor of 100kΩ connects between this pin and

GND.

Bit 1 for the I3C static address or used for adding static addressing capability in SPI mode. See the

Programming section for details. An internal pull-down resistor of 100kΩ connects between this pin and

GND.

Standby control for Channel B. HIGH/Open = device power OFF with SPI/I3C still powered ON, LOW =

device power ON. An internal pull-up resistor network connects between this pin and 1.67V.

STBY_B

RFIN_B

DSA1_B

Channel B RF input internally matched to 50Ω. Must use external DC block.

Logic control for channel B DSA1. Logic HIGH/Open = 6dB attenuation, logic LOW = 0dB attenuation. An

internal pull-up resistor network connects between this pin and 1.67V.

V_CC_AMP1_B

RSET1_B

Channel B amplifier 1 DC supply voltage. Connect bypass capacitor(s) as close to the pin as possible.

Connect 2.67kΩ external resistor to GND to optimize amplifier bias. Used with RDSET1_B pin 18.

Connect 9.1kΩ external resistor to GND to optimize amplifier bias. Used with RSET1_B pin 17.

Connect 4.7kΩ external resistor to GND to optimize amplifier gain variation over temperature.

Channel B amplifier 2 DC supply voltage. Connect bypass capacitor(s) as close to the pin as possible.

RDSET1_B

RFET_B

V_CC_AMP2_B

Logic control bit 0 for channel B DSA3. An internal pull-up resistor network connects between this pin and

1.67V.

DSA3_B_BIT0

DSA3_B_BIT1

Logic control bit 1 for channel B DSA3. An internal pull-up resistor network connects between this pin and

1.67V.

RFOUT_B

Channel B RF output internally matched to 50Ω. Must use external DC block.

V_CC_BIAS_B

Channel B bias circuitry DC supply voltage. Connect bypass capacitor(s) as close to the pin as possible.

September 1, 2020

1...5 6 789 10 11...65

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与F0443EVBI相关器件

型号	品牌	获取价格	描述	数据表
F0443LGRI	RENESAS	获取价格	Dual Matched Broadband RF DVGA 0.6GHz to 2.7GHz
F0443LGRI8	RENESAS	获取价格	Dual Matched Broadband RF DVGA 0.6GHz to 2.7GHz
F0448	RENESAS	获取价格	Dual Matched Broadband RF DVGA 3.4GHz to 3.8GHz
F0448EVB	RENESAS	获取价格	Dual Matched Broadband RF DVGA 3.4GHz to 3.8GHz
F0448EVS	RENESAS	获取价格	Dual Matched Broadband RF DVGA 3.4GHz to 3.8GHz
F0448NBGK	RENESAS	获取价格	Dual Matched Broadband RF DVGA 3.4GHz to 3.8GHz
F0448NBGK8	RENESAS	获取价格	Dual Matched Broadband RF DVGA 3.4GHz to 3.8GHz
F044-ND	LITTELFUSE	获取价格	Fuse Blocks and Clips - For 3AG Fuses
F045	LITTELFUSE	获取价格	Fuse Blocks and Clips - For 3AG Fuses
F0452B	RENESAS	获取价格	Dual Path RF Switch with LNA and DVGA 2.3GHz to 2.7GHz

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