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EPF6016ATI100-1 PDF预览

EPF6016ATI100-1

更新时间: 2024-01-07 23:30:51
品牌 Logo 应用领域
阿尔特拉 - ALTERA 时钟LTE输入元件可编程逻辑
页数 文件大小 规格书
59页 1051K
描述
Loadable PLD, CMOS, PQFP100, TQFP-100

EPF6016ATI100-1 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
零件包装代码:QFP包装说明:LFQFP, QFP100,.63SQ,20
针数:100Reach Compliance Code:compliant
HTS代码:8542.39.00.01风险等级:5.65
其他特性:ALSO CONFIGURABLE WITH 5V VCC最大时钟频率:172 MHz
JESD-30 代码:S-PQFP-G100JESD-609代码:e0
长度:14 mm湿度敏感等级:3
专用输入次数:4I/O 线路数量:81
输入次数:81逻辑单元数量:1320
输出次数:81端子数量:100
组织:4 DEDICATED INPUTS, 81 I/O输出函数:MACROCELL
封装主体材料:PLASTIC/EPOXY封装代码:LFQFP
封装等效代码:QFP100,.63SQ,20封装形状:SQUARE
封装形式:FLATPACK, LOW PROFILE, FINE PITCH峰值回流温度(摄氏度):220
电源:2.5/3.3,3.3 V可编程逻辑类型:LOADABLE PLD
认证状态:Not Qualified座面最大高度:1.27 mm
子类别:Field Programmable Gate Arrays最大供电电压:3.6 V
最小供电电压:3 V标称供电电压:3.3 V
表面贴装:YES技术:CMOS
端子面层:Tin/Lead (Sn/Pb)端子形式:GULL WING
端子节距:0.5 mm端子位置:QUAD
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:14 mm
Base Number Matches:1

EPF6016ATI100-1 数据手册

 浏览型号EPF6016ATI100-1的Datasheet PDF文件第4页浏览型号EPF6016ATI100-1的Datasheet PDF文件第5页浏览型号EPF6016ATI100-1的Datasheet PDF文件第6页浏览型号EPF6016ATI100-1的Datasheet PDF文件第8页浏览型号EPF6016ATI100-1的Datasheet PDF文件第9页浏览型号EPF6016ATI100-1的Datasheet PDF文件第10页 
FLEX 6000 Programmable Logic Device Family Data Sheet  
Figure 1. OptiFLEX Architecture Block Diagram  
IOEs  
Row FastTrack  
Interconnect  
Row FastTrack  
Interconnect  
Column FastTrack  
Interconnect  
IOEs  
Column FastTrack  
Interconnect  
Local Interconnect  
(Each LAB accesses  
two local interconnect  
areas.)  
Logic Elements  
FLEX 6000 devices provide four dedicated, global inputs that drive the  
control inputs of the flipflops to ensure efficient distribution of high-  
speed, low-skew control signals. These inputs use dedicated routing  
channels that provide shorter delays and lower skews than the FastTrack  
Interconnect. These inputs can also be driven by internal logic, providing  
an ideal solution for a clock divider or an internally generated  
asynchronous clear signal that clears many registers in the device. The  
dedicated global routing structure is built into the device, eliminating the  
need to create a clock tree.  
Altera Corporation  
7

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