Datasheet > EMB60A06V

EMB60A06V

更新时间： 2024-05-23 22:22:12

品牌	Logo	应用领域
杰力科技 - EXCELLIANCE		/
页数	文件大小	规格书
6页	853K
描述
EDFN3X3

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中文翻译

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EMB60A06V 数据手册

EMB60A06V

Dual N-Channel Logic Level Enhancement Mode Field Effect Transistor

Product Summary:

BVDSS

RDSON (MAX.)

60V

60mΩ

Dual N Channel MOSFET

UIS, Rg 100% Tested

Pb-Free Lead Plating & Halogen Free

ABSOLUTE MAXIMUM RATINGS (T_A= 25 °C Unless Otherwise Noted)

PARAMETERS/TEST CONDITIONS

SYMBOL

LIMITS

±20

UNIT

Gate-Source Voltage

V_GS

T_A= 25 °C

Continuous Drain Current

I_D

T_A= 100 °C

4.3

Pulsed Drain Current¹

I_DM

I_AS

Avalanche Current

L = 0.1mH, I_AS=12A, RG=25Ω

L = 0.05mH

Avalanche Energy

E_AS

E_AR

7.2

3.6

2.27

Repetitive Avalanche Energy²

T_A= 25 °C

Power Dissipation

P_D

°C

T_A= 100 °C

0.9

Operating Junction & Storage Temperature Range

T_j, T_stg

-55 to 150

100% UIS testing in condition of V_D=30V, L=0.1mH, V_G=10V, I_L=7.5A, Rated V_DS=60V N-CH

THERMAL RESISTANCE RATINGS

THERMAL RESISTANCE

SYMBOL

R_JC

TYPICAL

MAXIMUM

UNIT

Junction-to-Case

Junction-to-Ambient³

7.5

°C / W

R_JA

¹Pulse width limited by maximum junction temperature.

²Duty cycle  1％

³55°C / W when mounted on a 1 in²pad of 2 oz copper.

2019/3/21

p.1

12 3 4 5 6

中文翻译

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