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EM6A9320BIB-4IH PDF预览

EM6A9320BIB-4IH

更新时间: 2022-02-26 13:08:28
品牌 Logo 应用领域
钰创 - ETRON 动态存储器双倍数据速率
页数 文件大小 规格书
61页 502K
描述
4M x 32 bit DDR Synchronous DRAM (SDRAM)

EM6A9320BIB-4IH 数据手册

 浏览型号EM6A9320BIB-4IH的Datasheet PDF文件第54页浏览型号EM6A9320BIB-4IH的Datasheet PDF文件第55页浏览型号EM6A9320BIB-4IH的Datasheet PDF文件第56页浏览型号EM6A9320BIB-4IH的Datasheet PDF文件第58页浏览型号EM6A9320BIB-4IH的Datasheet PDF文件第59页浏览型号EM6A9320BIB-4IH的Datasheet PDF文件第60页 
EM6A9320BIB  
EtronTech  
Figure 39. Write without Auto Precharge  
tCK  
tCH tCL  
CK  
CK  
tIH  
tIS  
tIH  
CKE  
VALID  
tIS tIH  
WRITE  
NOP  
NOP  
PRE  
NOP  
NOP  
ACT  
RA  
NOP  
NOP  
NOP  
COMMAND  
A0-A7  
tIS tIH  
Col n  
A9-A11  
A8  
RA  
RA  
BA  
tIS tIH  
ALL BANKS  
ONE BANKS  
DIS AP  
tIS tIH  
Bank X  
*Bank X  
BA0,BA1  
Case 1:  
tRP  
tDSH  
tDQSH  
tDSH  
tDQSS  
tWR  
tDQSS=min  
tWPST  
DQS  
tDQSL  
tWPRES  
tWPRE  
DI  
n
DQ  
DM  
tDSS  
tDQSH  
tDSS  
tWPST  
Case 2:  
tDQSS=max  
tDQSS  
DQS  
tWPRES  
tDQSL  
tWPRE  
DI  
n
DQ  
DM  
DI n = Data In from column n  
Burst Length = 4 in the case shown  
3 subsequent elements of Data In are provided in the programmed order following DI n  
DIS AP = Disable Autoprecharge  
*= Don't Care , if A8 is HIGH at this point  
PRE = PRECHARGE, ACT = ACTIVE, RA = Row Address, BA = Bank Address, AR = AUTOREFRESH  
NOP commands are shown for ease of illustration; other commands may be valid at these times  
Although tDQSS is drawn only for the first DQS rising edge, each rising edge of DQS must fall within the +  
25% window of the corresponding positive clock edge  
Precharge may not be issued before tRAS ns after the ACTIVE command for applicable banks  
Don’t Care  
Etron Confidential  
57  
Rev 1.0  
July /2012  

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