5秒后页面跳转
EDI88257CA55CC PDF预览

EDI88257CA55CC

更新时间: 2024-11-02 19:32:55
品牌 Logo 应用领域
美高森美 - MICROSEMI 静态存储器内存集成电路
页数 文件大小 规格书
8页 762K
描述
Standard SRAM, 256KX8, 55ns, CMOS, CDIP32, 0.600 INCH, SIDE BRAZED, CERAMIC, DIP-32

EDI88257CA55CC 技术参数

是否无铅: 含铅是否Rohs认证: 不符合
生命周期:Transferred零件包装代码:DIP
包装说明:0.600 INCH, SIDE BRAZED, CERAMIC, DIP-32针数:32
Reach Compliance Code:compliantECCN代码:3A991.B.2.A
HTS代码:8542.32.00.41风险等级:5.16
最长访问时间:55 nsJESD-30 代码:R-CDIP-T32
长度:40.64 mm内存密度:2097152 bit
内存集成电路类型:STANDARD SRAM内存宽度:8
功能数量:1端子数量:32
字数:262144 words字数代码:256000
工作模式:ASYNCHRONOUS最高工作温度:70 °C
最低工作温度:组织:256KX8
封装主体材料:CERAMIC, METAL-SEALED COFIRED封装代码:DIP
封装形状:RECTANGULAR封装形式:IN-LINE
并行/串行:PARALLEL峰值回流温度(摄氏度):NOT SPECIFIED
认证状态:Not Qualified座面最大高度:3.937 mm
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):4.5 V
标称供电电压 (Vsup):5 V表面贴装:NO
技术:CMOS温度等级:COMMERCIAL
端子形式:THROUGH-HOLE端子节距:2.54 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:15.24 mmBase Number Matches:1

EDI88257CA55CC 数据手册

 浏览型号EDI88257CA55CC的Datasheet PDF文件第2页浏览型号EDI88257CA55CC的Datasheet PDF文件第3页浏览型号EDI88257CA55CC的Datasheet PDF文件第4页浏览型号EDI88257CA55CC的Datasheet PDF文件第5页浏览型号EDI88257CA55CC的Datasheet PDF文件第6页浏览型号EDI88257CA55CC的Datasheet PDF文件第7页 
EDI88257CA  
256Kx8 Monolithic SRAM  
FEATURES  
 Access Times of 20, 25, 35, 45, 55ns  
 Data Retention Function (LPA Versions)  
 TTL Compatible Inputs and Outputs  
 Fully Static, No Clocks  
The EDI88257CA is a 2 Megabit 256Kx8 bit Monolithic CMOS  
Static RAM.  
The 32 pin DIP pinout adheres to the JEDEC evolutionary standard  
for the two megabit device. The device is upgradeable to the  
512Kx8 SRAM, the EDI88512CA. Pin 1 becomes the higher order  
address.  
 Organized as 256Kx8  
 Commercial, Industrial and Military Temperature Ranges  
 JEDEC Approved Evolutionary Pinout  
• 32 pin Ceramic DIP, 0.6 mils wide (Package 9)  
 Single +5V (±10%) Supply Operation  
A Low Power version, EDI88257LPA, offers a data retention  
function for battery back-up opperation. Military product is available  
compliant to Appendix A of MIL-PRF-38535.  
This product is subject to change without notice.  
FIGURE 1 – PIN CONFIGURATION  
PIN DESCRIPTION  
I/O0-7  
A0-17  
WE#  
CS#  
OE#  
VCC  
Data Inputs/Outputs  
Address Inputs  
Write Enable  
32 DIP  
TOP VIEW  
Chip Selects  
Output Enable  
Power (+5V ±10%)  
Ground  
NC  
A16  
A14  
A12  
A7  
1
2
3
4
5
6
7
8
9
32 VCC  
31 A15  
30 A17  
29 WE#  
28 A13  
27 A8  
VSS  
NC  
Not Connected  
A6  
BLOCK DIAGRAM  
A5  
26 A9  
A4  
25 A11#  
24 OE  
23 A10  
22 CS#  
21 I/O7  
20 I/O6  
19 I/O5  
18 I/O4  
17 I/O3  
A3  
Memory Array  
A2 10  
A1 11  
A0 12  
I/O0 13  
I/O1 14  
I/O2 15  
VSS 16  
Address  
Buffer  
Address  
Decoder  
I/O  
Circuits  
A0-17  
I/O0-7  
WE#  
CS  
OE#  
Microsemi Corporation reserves the right to change products or specications without notice.  
March 2011 © 2011 Microsemi Corporation. All rights reserved.  
Rev. 4  
1
Microsemi Corporation • (602) 437-1520 • www.whiteedc.com  
www.microsemi.com  

与EDI88257CA55CC相关器件

型号 品牌 获取价格 描述 数据表
EDI88257CA55CI WEDC

获取价格

Standard SRAM, 256KX8, 55ns, CMOS, CDIP32, 0.600 INCH, SIDE BRAZED, CERAMIC, DIP-32
EDI88257CAXCB WEDC

获取价格

256Kx8 Monolithic SRAM
EDI88257CAXCC WEDC

获取价格

256Kx8 Monolithic SRAM
EDI88257CAXCI WEDC

获取价格

256Kx8 Monolithic SRAM
EDI88257CAXCM WEDC

获取价格

256Kx8 Monolithic SRAM
EDI88257CXCB WEDC

获取价格

256Kx8 Monolithic SRAM
EDI88257CXCC WEDC

获取价格

256Kx8 Monolithic SRAM
EDI88257CXCI WEDC

获取价格

256Kx8 Monolithic SRAM
EDI88257CXCM WEDC

获取价格

256Kx8 Monolithic SRAM
EDI88257LP100CB MICROSEMI

获取价格

Standard SRAM, 256KX8, 100ns, CMOS, CDIP32, 0.600 INCH, SIDE BRAZED, CERAMIC, DIP-32