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EDI88257LP85CC

更新时间: 2024-11-03 05:09:59
品牌 Logo 应用领域
美高森美 - MICROSEMI 静态存储器内存集成电路
页数 文件大小 规格书
6页 285K
描述
Standard SRAM, 256KX8, 85ns, CMOS, CDIP32, 0.600 INCH, SIDE BRAZED, CERAMIC, DIP-32

EDI88257LP85CC 数据手册

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EDI88257C  
White Electronic Designs  
256Kx8 Monolithic SRAM  
FEATURES  
256Kx8 CMOS Static  
The EDI88257C is a 2 Megabit 256Kx8 bit Monolithic  
CMOS Static RAM.  
Random Access Memory  
The 32 pin DIP pinout adheres to the JEDEC standard for  
the two megabit device, and is a pin replacement for the  
256Kx8 module, EDI88257C. The device is upgradeable  
to the 512Kx8 SRAM, the EDI88512C. Pin 1 becomes the  
higher order address.  
• Access Times of 70, 85, 100ns  
• Data Retention Function (LP Versions)  
• TTL Compatible Inputs and Outputs  
• Fully Static, No Clocks  
ALow Power version, EDI88257LP, offers a data retention  
function for battery back-up opperation. Military product is  
available compliant to Appendix A of MIL-PRF-38535.  
JEDEC Approved Pinout  
• 32 pin Ceramic DIP, 0.6 mils wide (Package 9)  
Single +5V ( 10ꢀ) Supply Operation  
FIGURE 1 – PIN CONFIGURATION  
32 DIP  
TOP VIEW  
PIN DESCRIPTION  
A0-17  
W#  
Address Inputs  
Write Enable  
NC  
A16  
A14  
A12  
A7  
A6  
A5  
A4  
A3  
A2 10  
A1 11  
A0 12  
DQ0 13  
DQ1 14  
DQ2 15  
VSS 16  
1
32 VCC  
31 A15  
30 A17  
29 W#  
28 A13  
27 A8  
E#  
Chip Enable  
2
3
4
5
6
7
8
9
G#  
Output Enable  
Data Inputs/Outputs  
Power (+5V 10ꢀ%  
Ground  
DQ0-7  
VCC  
VSS  
26 A9  
25 A11  
24 G#  
23 A10  
22 E#  
21 I/O7  
20 I/O6  
19 I/O5  
18 I/O4  
17 I/O3  
NC  
Not Connected  
BLOCK DIAGRAM  
Memory Array  
Address  
Buffer  
Address  
Decoder  
I/O  
Circuits  
A0-17  
DQ0-7  
W#  
E#  
G#  
White Electronic Designs Corp. reserves the right to change products or specifications without notice.  
September 1999  
Rev. 2  
1
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com  

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