EDI2GG41864V
576 Kilobyte Synchronous Card Edge DIMM
FEATURES
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4x64Kx18 Synchronous
Flow-Through Architecture
The EDI2KG41864VxxD2 is a Synchronous SRAM, 60 position
Card Edge DIMM (120 contacts) Module, organized as 4x64Kx18.
The Module contains four (4) Synchronous Burst Ram Devices,
packaged in the industry standard JEDEC 14mmx20mm TQFP
placed on a Multilayer FR4 Substrate. The module architecture is
defined as a Synchronous Only, Flow-Through, Early Write device.
This module provides high performance, ultra fast access times at a
cost per bit benefit over BiCMOS Asynchronous SRAM based
devices. As well as improved cost per bit, the use of Synchronous
or Synchronous Burst devices or modules can ease the memory
subsystem design by reducing or easing the memory controller
requirement.
Clock Controlled Registered Bank Enables (E1\,
E2\, E3, E4\)
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Clock Controlled Registered Address
Clock Controlled Registered Global Write (GW\)
Aysnchronous Output Enable (G\)
Internally self-timed Write
Gold Lead Finish
3.3V+ 10%, -5% Operation
Access Speed(s): TKHQV=9.5, 10, 11, 12, 15ns
Common Data I/O
Synchronous operations are in relation to an externally supplied clock,
registered address, registered global write, registered enables as well
as an Asynchronous Output enable. All read and Write operations to
this module are performed on Long Words (Double Words) 32 bit
operation.
High Capacitance (30pf) drive, at rated Access
Speed
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Single total array Clock
Multiple Vcc and Gnd
Write cycles are internally self timed and are initiated by a rising clock
edge. This feature relieves the designer the task of developing external
write pulse width circuitry.
PIN NAMES
DQ0-DQ17
Input/Output Bus
A0-A15
Address Bus
E1\, E2\, E3\, E4\
SynchronousBankEnables
Array Clock
Synchronous Global write Enable
Asynchronous Output Enable
3.3V Power Supply
Gnd
Clk
GW\
G\
Vcc
Vss
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White Electronic Designs Corporation
(508) 366-5151 www.whiteedc.com
• Westborough, MA 01581 •
July1999 Rev
ECO