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DSP56002DS

更新时间： 2024-01-22 16:01:41

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DSP56002 24- Bit Digital Signal Processor Data Sheet

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DSP56002DS 数据手册

Freescale Semiconductor, Inc.

SEMICONDUCTOR TECHNICAL DATA

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DSP56002/D, Rev. 3

DSP56002

24-BIT DIGITAL SIGNAL PROCESSOR

The DSP56002 is a MPU-style general purpose Digital Signal Processor (DSP) composed of an

efficient 24-bit DSP core, program and data memories, various peripherals, and support

circuitry. The DSP56000 core is fed by on-chip Program RAM, and two independent data RAMs.

The DSP56002 contains a Serial Communication Interface (SCI), Synchronous Serial Interface (SSI),

parallel Host Interface (HI), Timer/ Event Counter, Phase Lock Loop (PLL), and an On-Chip

Emulation (OnCE™) port. This combination of features, illustrated in Figure 1, makes the

DSP56002 a cost-effective, high-performance solution for high-precision general purpose digital

signal processing.

16-bit Bus

24-bit Bus

Program

Memory

512 × 24 RAM

64 × 24 ROM

(boot)

X Data

Memory

256 × 24 RAM

256 × 24 ROM

(A-law/ µ-law)

24-bit

Timer/

Event

Sync.

Serial

Comm.

(SCI)

Host

Interface

(HI)

Y Data

Memory

256 × 24 RAM

256 × 24 ROM

(sine)

Serial

(SSI)

or I/O

Counter

or I/O

External

Address

Bus

PAB

Address

Generation

Unit

24-bit

56000 DSP

Core

XAB

YAB

Switch

GDB

PDB

XDB

YDB

External

Data

Bus

Internal

Data

Bus

Data

Switch

OnCE™

Port

Control

Bus

Control

Program

Address

Data ALU

24 × 24 + 56 → 56-bit MAC

Two 56-bit Accumulators

Interrupt

Control

Decode

Controller

Generator

Clock

PLL

Gen.

Program Control Unit

IRQ

AA0604

Figure 1 DSP56002 Block Diagram

For More Information On This Product,

Go to: www.freescale.com

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