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DS26324GNA2+ PDF预览

DS26324GNA2+

更新时间： 2024-11-23 15:32:43
品牌 Logo 应用领域
美信 - MAXIM PC电信电信集成电路
页数 文件大小 规格书
120页 978K
描述
PCM Transceiver, 1-Func, PBGA256, 17 X 17 MM, 1 MM PITCH, ROHS COMPLIANT, CSBGA-256

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中文翻译

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DS26324GNA2+ 技术参数

是否无铅： 不含铅是否Rohs认证： 符合
生命周期：Obsolete零件包装代码：BGA
包装说明：17 X 17 MM, 1 MM PITCH, ROHS COMPLIANT, CSBGA-256针数：256
Reach Compliance Code：compliantHTS代码：8542.39.00.01
风险等级：5.73JESD-30 代码：S-PBGA-B256
JESD-609代码：e1长度：17 mm
湿度敏感等级：3功能数量：1
端子数量：256最高工作温度：85 °C
最低工作温度：-40 °C封装主体材料：PLASTIC/EPOXY
封装代码：BGA封装形状：SQUARE
封装形式：GRID ARRAY峰值回流温度（摄氏度）：260
认证状态：Not Qualified座面最大高度：1.76 mm
标称供电电压：3.3 V表面贴装：YES
电信集成电路类型：PCM TRANSCEIVER温度等级：INDUSTRIAL
端子面层：Tin/Silver/Copper (Sn/Ag/Cu)端子形式：BALL
端子节距：1 mm端子位置：BOTTOM
处于峰值回流温度下的最长时间：NOT SPECIFIED宽度：17 mm
Base Number Matches：1

DS26324GNA2+ 数据手册

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DEMO KIT AVAILABLE  
19-5754; Rev 3/11  
DS26324  
3.3V, 16-Channel, E1/T1/J1 Short-Haul Line Interface Unit  
GENERAL DESCRIPTION  
FEATURES  
.
16 E1, T1, or J1 Short-Haul Line Interface  
Units  
The DS26324 is a 16-channel short-haul line  
interface unit (LIU) that supports E1/T1/J1 from a  
single 3.3V power supply. A wide variety of  
applications are supported through internal  
impedance matching. A single bill of material can  
support E1/T1/J1 that requires no external  
termination. Redundancy is supported through  
nonintrusive monitoring, optimal high-impedance  
modes and configurable 1:1 or 1+1 backup  
enhancements. An on-chip synthesizer generates the  
E1/T1/J1 clock rates by a single master clock input of  
various frequencies. Two clock output references are  
also offered. The device is offered in a 256-pin  
TE-CSBGA, the smallest package available for a  
16-channel LIU.  
.
.
Independent E1, T1 or J1 Selections  
Fully Internal Impedance Match Requires No  
External Resistors  
.
Software-Selectable Transmit and Receive-  
Side Impedance Match  
.
.
Crystal-Less Jitter Attenuator  
Selectable Single-Rail and Dual-Rail Mode  
and AMI or HDB3/B8ZS Line Encoding and  
Decoding  
.
.
Detection and Generation of AIS  
Digital/Analog Loss of Signal Detection as  
per T1.231, G.775 and ETS 300 233  
APPLICATIONS  
T1 Digital Cross-Connects  
ATM and Frame Relay Equipment  
Wireless Base Stations  
.
External Master Clock Can Be Multiple of  
2.048MHz or 1.544MHz for T1/J1 or E1  
Operation; This Clock Will Be Internally  
Adapted for T1 or E1 Usage  
ISDN Primary Rate Interface  
E1/T1/J1 Multiplexer and Channel Banks  
E1/T1/J1 LAN/WAN Routers  
.
Receiver Signal Level Indicator from -2.5dB to  
-20dB in 2.5dB Increments  
.
.
Two Built-In BERT Testers for Diagnostics  
FUNCTIONAL DIAGRAM  
8-Bit Parallel Interface Support for Intel or  
Motorola Mode or a 4-Wire Serial Interface  
.
.
.
Transmit Short-Circuit Protection  
G.772 Nonintrusive Monitoring  
JTAG  
SOFTWARE CONTROL  
AND JTAG  
Receive Monitor Mode Handles Combinations  
of 14dB to 20dB of Resistive Attenuation  
Along with 12dB to 30dB of Cable Attenuation  
LOSS  
RTIP  
RPOS  
RNEG  
RCLK  
.
Specification Compliance to the Latest T1  
and E1 Standards  
RECEIVER  
RRING  
TPOS  
TTIP  
.
.
Single 3.3V Supply with 5V Tolerant I/O  
JTAG Boundary Scan as Per IEEE 1149.1  
TNEG  
TCLK  
TRANSMITTER  
TRING  
1
ORDERING INFORMATION  
PART  
TEMP RANGE PIN-PACKAGE  
DS26324G+  
0°C to +70°C 256 TE-CSBGA  
16  
DS26324GN+ -40°C to +85°C 256 TE-CSBGA  
DS26324G  
DS26324GN  
0°C to +70°C 256 TE-CSBGA  
-40°C to +85°C 256 TE-CSBGA  
+Denotes a lead(Pb)-free/RoHS compliant package.  
Note: Some revisions of this device may incorporate deviations from published specifications known as errata. Multiple revisions of any device  
may be simultaneously available through various sales channels. For information about device errata, click here: www.maxim-ic.com/errata.  
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