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DS26334GNA2 PDF预览

DS26334GNA2

更新时间: 2024-09-25 19:53:07
品牌 Logo 应用领域
美信 - MAXIM /
页数 文件大小 规格书
121页 787K
描述
Digital Transmission Interface, PBGA256

DS26334GNA2 技术参数

是否无铅: 含铅是否Rohs认证: 不符合
生命周期:ObsoleteReach Compliance Code:not_compliant
风险等级:5.88JESD-30 代码:S-PBGA-B256
端子数量:256最高工作温度:85 °C
最低工作温度:-40 °C封装主体材料:PLASTIC/EPOXY
封装代码:BGA封装等效代码:BGA256,16X16,40
封装形状:SQUARE封装形式:GRID ARRAY
电源:3.3 V认证状态:Not Qualified
子类别:Digital Transmission Interfaces最大压摆率:1100 mA
标称供电电压:3.3 V表面贴装:YES
温度等级:INDUSTRIAL端子形式:BALL
端子节距:1 mm端子位置:BOTTOM
Base Number Matches:1

DS26334GNA2 数据手册

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DEMO KIT AVAILABLE  
DS26334  
3.3V, 16-Channel, E1/T1/J1 Short-  
and Long-Haul Line Interface Unit  
www.maxim-ic.com  
GENERAL DESCRIPTION  
FEATURES  
.
16 E1, T1, or J1 Short/Long-Haul Line  
Interface Units  
The DS26334 is a 16-channel short/long-haul line  
interface unit (LIU) that supports E1/T1/J1 from a  
single 3.3V power supply. A single bill of material can  
support E1/T1/J1 that requires no external  
termination. Redundancy is supported through  
nonintrusive monitoring, optimal high-impedance  
modes and configurable 1:1 or 1+1 backup  
enhancements. An on-chip synthesizer generates the  
E1/T1/J1 clock rates by a single master clock input of  
various frequencies. Two clock output references are  
also offered. The device is offered in a 256-pin  
TE-CSBGA, the smallest package available for a  
16-channel LIU.  
.
.
Independent E1, T1 or J1 Selections  
Fully Internal Impedance Match Requires No  
External Resistors  
.
Software-Selectable Transmit and Receive-  
Side Impedance Match  
.
.
Crystal-Less Jitter Attenuator  
Selectable Single-Rail and Dual-Rail Mode  
and AMI or HDB3/B8ZS Line Encoding and  
Decoding  
.
.
Detection and Generation of AIS  
Digital/Analog Loss of Signal Detection as  
per T1.231, G.775 and ETS 300 233  
APPLICATIONS  
T1 Digital Cross-Connects  
ATM and Frame Relay Equipment  
Wireless Base Stations  
ISDN Primary Rate Interface  
E1/T1/J1 Multiplexer and Channel Banks  
E1/T1/J1 LAN/WAN Routers  
.
External Master Clock Can Be Multiple of  
2.048MHz or 1.544MHz for T1/J1 or E1  
Operation; This Clock Will Be Internally  
Adapted for T1 or E1 Usage  
.
Receiver Signal Level Indicator from -2.5dB to  
-38dB in T1 Mode and -3dB to -43dB in E1  
Mode in 2.5dB Increments  
FUNCTIONAL DIAGRAM  
.
.
Two Built-In BERT Testers for Diagnostics  
JTAG  
MODE  
LOSS  
8-Bit Parallel Interface Support for Intel or  
Motorola Mode or a 4-Wire Serial Interface  
SOFTWARE CONTROL  
AND JTAG  
.
.
.
Transmit Short-Circuit Protection  
G.772 Nonintrusive Monitoring  
Receive Monitor Mode Handles Combinations  
of 14dB to 30dB of Resistive Attenuation  
Along with 12dB to 30dB of Cable Attenuation  
RTIP  
RPOS  
RNEG  
RCLK  
RECEIVER  
RRING  
TPOS  
TTIP  
TNEG  
TCLK  
TRANSMITTER  
TRING  
.
Specification Compliance to the Latest T1  
and E1 Standards—ANSI T1.102, AT&T Pub  
62411, T1.231, T1.403, ITU-T G.703, G.742,  
G.775, G.823, ETS 300 166, and ETS 300 233  
1
.
.
Single 3.3V Supply with 5V Tolerant I/O  
JTAG Boundary Scan as Per IEEE 1149.1  
16  
ORDERING INFORMATION  
PART  
TEMP RANGE PIN-PACKAGE  
DS26334G  
0°C to +70°C 256 TE-CSBGA  
DS26334GN -40°C to +85°C 256 TE-CSBGA  
Note: Some revisions of this device may incorporate deviations from published specifications known as errata. Multiple revisions of any device  
may be simultaneously available through various sales channels. For information about device errata, click here: www.maxim-ic.com/errata.  
1 of 121  
REV: 012108  

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