5秒后页面跳转
DS26502 PDF预览

DS26502

更新时间: 2024-11-25 22:40:35
品牌 Logo 应用领域
美信 - MAXIM /
页数 文件大小 规格书
124页 993K
描述
T1/E1/J1/64KCC BITS Element

DS26502 数据手册

 浏览型号DS26502的Datasheet PDF文件第2页浏览型号DS26502的Datasheet PDF文件第3页浏览型号DS26502的Datasheet PDF文件第4页浏览型号DS26502的Datasheet PDF文件第5页浏览型号DS26502的Datasheet PDF文件第6页浏览型号DS26502的Datasheet PDF文件第7页 
DS26502  
T1/E1/J1/64KCC BITS Element  
www.maxim-ic.com  
GENERAL DESCRIPTION  
FEATURES  
The DS26502 is a building-integrated timing-  
supply (BITS) clock-recovery element. It also  
functions as a basic T1/E1 transceiver. The  
receiver portion can recover a clock from T1,  
E1, 64kHz composite clock (64KCC), and  
6312kHz synchronization timing interfaces. In  
T1 and E1 modes, the Synchronization Status  
Message (SSM) can also be recovered. The  
transmit portion can directly interface to T1, E1,  
or 64KCC synchronization interfaces as well as  
source the SSM in T1 and E1 modes. The  
DS26502 can translate between any of the  
supported inbound synchronization clock rates to  
any supported outbound rate. A separate output  
is provided to source a 6312kHz clock. The  
device is controlled through a parallel, serial, or  
hardware controller port.  
CG.703 2048kHz Synchronization Interface  
Compliant  
CG.703 64kHz Centralized (Option A) and  
Codirectional Timing Interface Compliant  
CG.703 Appendix II 64kHz and 6312kHz  
Japanese Synchronization Interface  
Compliant  
CInterfaces to Standard T1/J1 (1.544MHz) and  
E1 (2.048MHz)  
CInterface to CMI-Coded T1/J1 and E1  
CShort- and Long-Haul Line Interface  
CTransmit and Receive T1 and E1 SSM  
Messages with Message Validation  
CT1/E1 Jitter Attenuator with Bypass Mode  
CFully Independent Transmit and Receive  
Functionality  
CInternal Software-Selectable Receive- and  
Transmit-Side Termination for  
75/100/110/120T1, E1, and  
Composite Clock Interfaces  
APPLICATIONS  
CMonitor Mode for Bridging Applications  
CAccepts 16.384MHz, 8.192MHz, 4.096MHz,  
or 2.048MHz Master Clock  
BITS Timing  
Rate Conversion  
C64kHz, 8kHZ, and 400Hz Outputs in  
Composite Clock Mode  
ORDERING INFORMATION  
C8-Bit Parallel Control Port, Multiplexed or  
Nonmultiplexed, Intel or Motorola  
CSerial (SPI) Control Port  
PART  
TEMP RANGE PIN-PACKAGE  
DS26502L  
0°C to +70°C  
64 LQFP  
CHardware Control Mode  
DS26502LN -40°C to +85°C 64 LQFP  
CProvides LOS, AIS, and LOF Indications  
Through Hardware Output Pins  
CFast Transmitter-Output Disable Through  
Device Pin for Protection Switching  
CIEEE 1149.1 JTAG Boundary Scan  
C3.3V Supply with 5V-Tolerant Inputs and  
Outputs  
Note: Some revisions of this device may incorporate deviations from published specifications known as errata. Multiple revisions of any device  
may be simultaneously available through various sales channels. For information about device errata, click here: www.maxim-ic.com/errata.  
1 of 124  
REV: 032405  

与DS26502相关器件

型号 品牌 获取价格 描述 数据表
DS26502_06 DALLAS

获取价格

T1/E1/J1/64KCC BITS Element
DS26502L DALLAS

获取价格

T1/E1/J1/64KCC BITS Element
DS26502L MAXIM

获取价格

T1/E1/J1/64KCC BITS Element
DS26502LN MAXIM

获取价格

T1/E1/J1/64KCC BITS Element
DS26502LN DALLAS

获取价格

T1/E1/J1/64KCC BITS Element
DS26502LN+ MAXIM

获取价格

Framer, PQFP64, 10 X 10 MM, 1.40 MM HEIGHT, LQFP-64
DS26502LN+T MAXIM

获取价格

Framer, PQFP64, 10 X 10 MM, 1.40 MM HEIGHT, LQFP-64
DS26503 DALLAS

获取价格

T1/E1/J1 BITS Element
DS26503 MAXIM

获取价格

T1/E1/J1/64KCC BITS Element
DS26503 ADI

获取价格

T1/E1/J1 BITS单元