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DS25MB100TSQ/NOPB PDF预览

DS25MB100TSQ/NOPB

更新时间: 2023-09-03 20:31:41
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德州仪器 - TI 复用器
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23页 850K
描述
具有发送预加重和接收均衡功能的 2.5Gbps 2:1/1:2 CML 多路复用器/缓冲器 | NJK | 36 | -40 to 85

DS25MB100TSQ/NOPB 数据手册

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DS25MB100  
SNLS243H SEPTEMBER 2006REVISED MARCH 2016  
DS25MB100 2.5 Gbps 2:1/1:2 CML Mux/Buffer With Transmit Pre-Emphasis and Receive  
Equalization  
1 Features  
3 Description  
The DS25MB100 device is a signal conditioning 2:1  
multiplexer and 1:2 fan-out buffer designed for use in  
backplane-redundancy or cable driving applications.  
Signal conditioning features include continuous time  
linear equalization (CTLE) and programmable output  
pre-emphasis that enable data communication in FR4  
backplane up to 2.5 Gbps. Each input stage has a  
fixed equalizer to reduce ISI distortion from board  
traces.  
1
2:1 Multiplexer and 1:2 Buffer  
0.25-Gbps to 2.5-Gbps Fully Differential Data  
Paths  
Fixed Input Equalization  
Programmable Output Pre-Emphasis  
Independent Pre-Emphasis Controls  
Programmable Loopback Modes  
On-Chip Terminations  
All output drivers have four selectable levels of pre-  
emphasis to compensate for transmission losses from  
long FR4 backplane or cable attenuation reducing  
deterministic jitter. The pre-emphasis levels can be  
independently controlled for the line-side and switch-  
side drivers. The internal loopback paths from switch-  
side input to switch-side output enable at-speed  
system testing. All receiver inputs are internally  
terminated with 100-Ω differential terminating  
resistors. All driver outputs are internally terminated  
ESD Rating of 6-kV HBM  
3.3-V Supply  
Low power, 0.45 W Typical  
Lead-Less WQFN-36 Package  
40°C to +85°C Operating Temperature Range  
2 Applications  
Backplane Drivers or Cable Driver  
Redundancy and Signal Conditioning Applications  
CPRI/OBSAI  
with 50-Ω terminating resistors to VCC  
.
Device Information(1)  
PART NUMBER  
PACKAGE  
WQFN (36)  
BODY SIZE (NOM)  
6.00 mm × 6.00 mm  
DS25MB100  
(1) For all available packages, see the orderable addendum at  
the end of the data sheet.  
Simplified Block Diagram  
Switch Side  
Line Side  
EQ  
IN0 +-  
EQS  
OUT+-  
DE_L  
MUX  
EQ  
IN1 +-  
LB0  
OUT0 +-  
DE_S  
DE_S  
OUT1 +-  
LB1  
IN+-  
EQL  
EQ  
DEL_0  
DEL_1  
VCC  
GND  
RSV  
DE_L  
Pre- emphasis  
Control  
DES_0  
DES_1  
DE _S  
All CML inputs and outputs must be AC coupled for optimal performance.  
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,  
intellectual property matters and other important disclaimers. PRODUCTION DATA.  
 
 
 
 

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