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DS25MB200TSQ/NOPB PDF预览

DS25MB200TSQ/NOPB

更新时间: 2024-11-26 13:07:27
品牌 Logo 应用领域
美国国家半导体 - NSC 复用器
页数 文件大小 规格书
14页 320K
描述
IC DUAL LINE TRANSCEIVER, QCC48, 7 X 7 MM, 0.80 MM HEIGHT, 0.50 MM PITCH, ROHS COMPLIANT, LLP-48, Line Driver or Receiver

DS25MB200TSQ/NOPB 技术参数

是否Rohs认证:符合生命周期:Transferred
包装说明:HVQCCN, LCC48,.27SQ,20Reach Compliance Code:compliant
ECCN代码:EAR99HTS代码:8542.39.00.01
风险等级:5.48Is Samacsys:N
差分输出:YES驱动器位数:2
输入特性:DIFFERENTIAL接口集成电路类型:LINE TRANSCEIVER
接口标准:GENERAL PURPOSEJESD-30 代码:S-XQCC-N48
JESD-609代码:e3长度:7 mm
湿度敏感等级:3功能数量:2
端子数量:48最高工作温度:85 °C
最低工作温度:-40 °C封装主体材料:UNSPECIFIED
封装代码:HVQCCN封装等效代码:LCC48,.27SQ,20
封装形状:SQUARE封装形式:CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE
峰值回流温度(摄氏度):260电源:3.3 V
认证状态:Not Qualified最大接收延迟:2 ns
接收器位数:2座面最大高度:0.8 mm
子类别:Line Driver or Receivers最大供电电压:3.465 V
最小供电电压:3.135 V标称供电电压:3.3 V
表面贴装:YES温度等级:INDUSTRIAL
端子面层:Matte Tin (Sn)端子形式:NO LEAD
端子节距:0.5 mm端子位置:QUAD
处于峰值回流温度下的最长时间:40最大传输延迟:2 ns
宽度:7 mmBase Number Matches:1

DS25MB200TSQ/NOPB 数据手册

 浏览型号DS25MB200TSQ/NOPB的Datasheet PDF文件第2页浏览型号DS25MB200TSQ/NOPB的Datasheet PDF文件第3页浏览型号DS25MB200TSQ/NOPB的Datasheet PDF文件第4页浏览型号DS25MB200TSQ/NOPB的Datasheet PDF文件第5页浏览型号DS25MB200TSQ/NOPB的Datasheet PDF文件第6页浏览型号DS25MB200TSQ/NOPB的Datasheet PDF文件第7页 
April 9, 2008  
DS25MB200  
Dual 2.5 Gbps 2:1/1:2 CML Mux/Buffer with Transmit Pre-  
Emphasis and Receive Equalization  
General Description  
Features  
The DS25MB200 is a dual signal conditioning 2:1 multiplexer  
and 1:2 fan-out buffer designed for use in backplane redun-  
dancy applications. Signal conditioning features include input  
equalization and programmable output pre-emphasis that en-  
able data communication in FR4 backplanes up to 2.5 Gbps.  
Each input stage has a fixed equalizer to reduce ISI distortion  
from board traces. All output drivers have 4 selectable steps  
of pre-emphasis to compensate for transmission losses from  
long FR4 backplanes and reduce deterministic jitter. The pre-  
emphasis levels can be independently controlled for the line-  
side and switch-side drivers. The internal loopback paths from  
switch-side input to switch-side output enable at-speed sys-  
tem testing. All receiver inputs are internally terminated with  
100differential terminating resistors. All drivers are inter-  
0.6–2.5 Gbps low jitter operation  
Fixed input equalization  
Programmable output pre-emphasis  
Independent switch and line side pre-emphasis controls  
Programmable switch-side loopback modes  
On-chip terminations  
HBM ESD rating 6 kV on all pins  
+3.3V supply  
Lead-less LLP-48 package (7mm x 7mm x 0.8mm, 0.5mm  
pitch)  
—40°C to +85°C operating temperature range  
nally terminated with 50to VCC  
.
Applications  
Backplane or cable driver  
Redundancy and signal conditioning applications  
Functional Block Diagram  
20182333  
© 2008 National Semiconductor Corporation  
201823  
www.national.com  

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