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DS25MB100TSQX PDF预览

DS25MB100TSQX

更新时间: 2024-11-23 13:00:35
品牌 Logo 应用领域
美国国家半导体 - NSC 复用器
页数 文件大小 规格书
16页 995K
描述
IC DUAL LINE TRANSCEIVER, QCC36, LLP-36, Line Driver or Receiver

DS25MB100TSQX 技术参数

是否Rohs认证: 符合生命周期:Transferred
包装说明:HVQCCN, LCC36,.25SQ,20Reach Compliance Code:compliant
ECCN代码:EAR99HTS代码:8542.39.00.01
风险等级:5.48差分输出:YES
驱动器位数:2输入特性:DIFFERENTIAL
接口集成电路类型:LINE TRANSCEIVER接口标准:GENERAL PURPOSE
JESD-30 代码:S-XQCC-N36JESD-609代码:e3
长度:6 mm湿度敏感等级:3
功能数量:2端子数量:36
最高工作温度:85 °C最低工作温度:-40 °C
封装主体材料:UNSPECIFIED封装代码:HVQCCN
封装等效代码:LCC36,.25SQ,20封装形状:SQUARE
封装形式:CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE峰值回流温度(摄氏度):260
电源:3.3 V认证状态:Not Qualified
最大接收延迟:1 ns接收器位数:2
座面最大高度:0.8 mm子类别:Line Driver or Receivers
最大供电电压:3.465 V最小供电电压:3.135 V
标称供电电压:3.3 V表面贴装:YES
温度等级:INDUSTRIAL端子面层:Matte Tin (Sn)
端子形式:NO LEAD端子节距:0.5 mm
端子位置:QUAD处于峰值回流温度下的最长时间:40
最大传输延迟:1 ns宽度:6 mm
Base Number Matches:1

DS25MB100TSQX 数据手册

 浏览型号DS25MB100TSQX的Datasheet PDF文件第2页浏览型号DS25MB100TSQX的Datasheet PDF文件第3页浏览型号DS25MB100TSQX的Datasheet PDF文件第4页浏览型号DS25MB100TSQX的Datasheet PDF文件第5页浏览型号DS25MB100TSQX的Datasheet PDF文件第6页浏览型号DS25MB100TSQX的Datasheet PDF文件第7页 
December 6, 2007  
DS25MB100  
2.5 Gbps 2:1/1:2 CML Mux/Buffer with Transmit De-  
Emphasis and Receive Equalization  
General Description  
Features  
The DS25MB100 is a signal conditioning 2:1 multiplexer and  
1:2 fan-out buffer designed for use in backplane redundancy  
or cable driving applications. Signal conditioning features in-  
clude input equalization and programmable output de-em-  
phasis that enable data communication in FR4 backplane up  
to 2.5 Gbps. Each input stage has a fixed equalizer to reduce  
ISI distortion from board traces. All output drivers have four  
selectable levels of de-emphasis to compensate for trans-  
mission losses from long FR4 backplane or cable attenuation  
reducing deterministic jitter. The de-emphasis levels can be  
independently controlled for the line-side and switch-side  
drivers. The internal loopback paths from switch-side input to  
switch-side output enable at-speed system testing. All receiv-  
er inputs and driver outputs are internally terminated with  
100differential terminating resistors.  
2:1 multiplexer and 1:2 buffer  
0.25–2.5 Gbps fully differential data paths  
Fixed input equalization  
Programmable output de-emphasis  
Independent de-emphasis controls  
Programmable loopback modes  
On-chip terminations  
HBM ESD rating 5.5 kV on all pins  
+3.3V supply  
Low power, 0.45 W typical  
Lead-less LLP-36 package  
−40°C to +85°C operating temperature range  
Applications  
Backplane or cable driver  
Redundancy and signal conditioning applications  
CPRI/OBSAI  
Functional Block Diagram  
20208901  
© 2007 National Semiconductor Corporation  
202089  
www.national.com  

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