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DM74LS293M PDF预览

DM74LS293M

更新时间: 2024-11-08 23:00:43
品牌 Logo 应用领域
美国国家半导体 - NSC 计数器触发器逻辑集成电路光电二极管
页数 文件大小 规格书
6页 108K
描述
4-Bit Binary Counter

DM74LS293M 数据手册

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June 1989  
DM74LS293 4-Bit Binary Counter  
General Description  
The ’LS293 counter is electrically and functionally identical  
to the ’LS93. Only the arrangement of the terminals has  
been changed for the ’LS293.  
To use the maximum count length (four-bit binary) of these  
counters, the B input is connected to the Q output. The  
A
input count pulses are applied to input A and the outputs are  
as described in the appropriate function table.  
Each of these monolithic counters contains four master-  
slave flip-flops and additional gating to provide a divide-by-  
two counter and a three-stage binary counter for which the  
count cycle length is divide-by-eight.  
Features  
Y
GND and V  
respectively)  
on Corner Pins (Pins 7 and 14  
CC  
All of these counters have a gated zero reset.  
Y
Y
Typical power dissipation 45 mW  
Count frequency 42 MHz  
Connection Diagram  
Dual-In-Line Package  
TL/F/6423–1  
Order Number DM74LS293M or DM74LS293N  
See NS Package Number M14A or N14A  
C
1995 National Semiconductor Corporation  
TL/F/6423  
RRD-B30M105/Printed in U. S. A.  

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