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DM74LS299WMX PDF预览

DM74LS299WMX

更新时间: 2024-11-29 19:48:19
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD 光电二极管输出元件逻辑集成电路触发器
页数 文件大小 规格书
6页 64K
描述
Parallel In Parallel Out, LS Series, 8-Bit, Bidirectional, True Output, TTL, PDSO20, 0.300 INCH, MS-013, SOIC-20

DM74LS299WMX 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
零件包装代码:SOIC包装说明:SOP, SOP20,.4
针数:20Reach Compliance Code:unknown
HTS代码:8542.39.00.01风险等级:5.32
其他特性:HOLD MODE; COMMON I/O PINS; GATED OUTPUT CONTROL计数方向:BIDIRECTIONAL
系列:LSJESD-30 代码:R-PDSO-G20
JESD-609代码:e0长度:12.8 mm
逻辑集成电路类型:PARALLEL IN PARALLEL OUT最大频率@ Nom-Sup:35000000 Hz
位数:8功能数量:1
端子数量:20最高工作温度:70 °C
最低工作温度:输出特性:3-STATE
输出极性:TRUE封装主体材料:PLASTIC/EPOXY
封装代码:SOP封装等效代码:SOP20,.4
封装形状:RECTANGULAR封装形式:SMALL OUTLINE
峰值回流温度(摄氏度):NOT SPECIFIED电源:5 V
传播延迟(tpd):35 ns认证状态:Not Qualified
座面最大高度:2.65 mm子类别:Shift Registers
最大供电电压 (Vsup):5.25 V最小供电电压 (Vsup):4.75 V
标称供电电压 (Vsup):5 V表面贴装:YES
技术:TTL温度等级:COMMERCIAL
端子面层:Tin/Lead (Sn/Pb)端子形式:GULL WING
端子节距:1.27 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED触发器类型:POSITIVE EDGE
宽度:7.5 mm最小 fmax:35 MHz
Base Number Matches:1

DM74LS299WMX 数据手册

 浏览型号DM74LS299WMX的Datasheet PDF文件第2页浏览型号DM74LS299WMX的Datasheet PDF文件第3页浏览型号DM74LS299WMX的Datasheet PDF文件第4页浏览型号DM74LS299WMX的Datasheet PDF文件第5页浏览型号DM74LS299WMX的Datasheet PDF文件第6页 
October 1988  
Revised March 2000  
DM74LS299  
8-Input Universal Shift/Storage Register with  
Common Parallel I/O Pins  
General Description  
Features  
Common I/O for reduced pin count  
The DM74LS299 is an 8-bit universal shift/storage register  
with 3-STATE outputs. Four modes of operation are possi-  
ble: hold (store), shift left, shift right and load data. The par-  
allel load inputs and flip-flop outputs are multiplexed to  
reduce the total number of package pins. Separate outputs  
are provided for flip-flops Q0 and Q7 to allow easy cascad-  
ing. A separate active LOW Master Reset is used to reset  
the register.  
Four operation modes: shift left, shift right, load and  
store  
Separate shift right serial input and shift left serial input  
for easy cascading  
3-STATE outputs for bus oriented applications  
Ordering Code:  
Order Number Package Number  
Package Description  
DM74LS299WM  
DM74LS299N  
M20B  
N20A  
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide  
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide  
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.  
Logic Symbol  
Connection Diagram  
V
= Pin 20  
CC  
GND = Pin 10  
Pin Descriptions  
Pin  
Names  
Description  
CP  
Clock Pulse Input (Active Rising Edge)  
Serial Data Input for Right Shift  
Serial Data Input for Left Shift  
DS0  
DS7  
S0, S1  
MR  
Mode Select Inputs  
Asynchronous Master Reset Input (Active LOW)  
OE1, OE2 3-STATE Output Enable Inputs (Active LOW)  
I/O0–I/O7 Parallel Data Inputs or 3-STATE Parallel Outputs  
Q0–Q7  
Serial Outputs  
© 2000 Fairchild Semiconductor Corporation  
DS009827  
www.fairchildsemi.com  

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