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DM74LS293N

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DM74LS293N 数据手册

June 1989

DM74LS293 4-Bit Binary Counter

General Description

The ’LS293 counter is electrically and functionally identical

to the ’LS93. Only the arrangement of the terminals has

been changed for the ’LS293.

To use the maximum count length (four-bit binary) of these

counters, the B input is connected to the Q output. The

input count pulses are applied to input A and the outputs are

as described in the appropriate function table.

Each of these monolithic counters contains four master-

slave flip-flops and additional gating to provide a divide-by-

two counter and a three-stage binary counter for which the

count cycle length is divide-by-eight.

Features

GND and V

respectively)

on Corner Pins (Pins 7 and 14

All of these counters have a gated zero reset.

Typical power dissipation 45 mW

Count frequency 42 MHz

Connection Diagram

Dual-In-Line Package

TL/F/6423–1

Order Number DM74LS293M or DM74LS293N

See NS Package Number M14A or N14A

1995 National Semiconductor Corporation

TL/F/6423

RRD-B30M105/Printed in U. S. A.

12 3 4 5 6

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型号	品牌	获取价格	描述	数据表
DM74LS293N/A+	ETC	获取价格	Asynchronous Up Counter
DM74LS293N/B+	ETC	获取价格	Asynchronous Up Counter
DM74LS295A	NSC	获取价格	4-BIT SHIFT REGISTER WITH TRI-STATE OUTPUTS
DM74LS295AM	NSC	获取价格	4-BIT SHIFT REGISTER WITH TRI-STATE OUTPUTS
DM74LS295AMX	TI	获取价格	LS SERIES, 4-BIT RIGHT PARALLEL IN PARALLEL OUT SHIFT REGISTER, TRUE OUTPUT, PDSO14, 0.150
DM74LS295AN	NSC	获取价格	4-BIT SHIFT REGISTER WITH TRI-STATE OUTPUTS
DM74LS298	FAIRCHILD	获取价格	Quad 2-Port Register Multiplexer with Storage
DM74LS298	NSC	获取价格	QUAD 2-PORT REGISTER MULTIPLEXER WITH STORAGE
DM74LS298J	TI	获取价格	IC,LOGIC MUX,QUAD,2-INPUT,LS-TTL,DIP,16PIN,CERAMIC
DM74LS298J/A+	ETC	获取价格	2-Input Digital Multiplexer