DAC5662-EP
www.ti.com
SGLS340A–JUNE 2006–REVISED OCTOBER 2006
DUAL 12-BIT 200-MSPS DIGITAL-TO-ANALOG CONVERTER
FEATURES
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High Spurious-Free Dynamic Range (SFDR):
85 dBc at 5 MHz
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Controlled Baseline
High Third-Order Two-Tone Intermodulation
(IMD3): 78 dBc at 15.1 and 16.1 MHz
– One Assembly
– One Test Site
WCDMA Adjacent Channel Leakage Ratio
(ACLR): 70 dB at 30.72 MHz
– One Fabrication Site
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Extended Temperature Performance of
–55°C to 125°C
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Independent or Single Resistor Gain Control
Dual or Interleaved Data
Enhanced Diminishing Manufacturing
Sources (DMS) Support
On-Chip 1.2-V Reference
Low Power: 330 mW
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Enhanced Product-Change Notification
(1)
Power-Down Mode: 15 mW
Qualification Pedigree
Package: 48-Pin Thin Quad Flat Pack (TQFP)
12-Bit Dual Transmit Digital-to-Analog
Converter (DAC)
APPLICATIONS
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200-MSPS Update Rate
Cellular Base Transceiver Station Transmit
Channel
Single Supply: 3 V to 3.6 V
(1) Component qualification in accordance with JEDEC and
industry standards to ensure reliable operation over an
extended temperature range. This includes, but is not limited
to, Highly Accelerated Stress Test (HAST) or biased 85/85,
temperature cycle, autoclave or unbiased HAST,
– CDMA: W-CDMA, CDMA2000, IS-95
– TDMA: GSM, IS-136, EDGE/UWC-136
Medical/Test Instrumentation
Arbitrary Waveform Generators (ARB)
Direct Digital Synthesis (DDS)
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electromigration, bond intermetallic life, and mold compound
life. Such qualification testing should not be viewed as
justifying use of this component beyond specified
performance and environmental limits.
Cable Modem Termination System (CMTS)
DESCRIPTION
The DAC5662 is a monolithic, dual-channel 12-bit, high-speed digital-to-analog converter (DAC) with on-chip
voltage reference.
Operating with update rates of up to 200 MSPS, the DAC5662 offers exceptional dynamic performance, tight
gain, and offset matching characteristics that make it suitable in either I/Q baseband or direct IF communication
applications.
Each DAC has a high-impedance differential-current output, suitable for single-ended or differential
analog-output configurations. External resistors allow scaling the full-scale output current for each DAC
separately or together, typically between 2 mA and 20 mA. An accurate on-chip voltage reference is temperature
compensated and delivers a stable 1.2-V reference voltage. Optionally, an external reference may be used.
The DAC5662 has two 12-bit parallel input ports with separate clocks and data latches. For flexibility, the
DAC5662 also supports multiplexed data for each DAC on one port when operating in the interleaved mode.
The DAC5662 has been specifically designed for a differential transformer coupled output with a 50-Ω doubly
terminated load. For a 20-mA full-scale output current a 4:1 impedance ratio (resulting in an output power of
4 dBm) and 1:1 impedance ratio transformer (–2-dBm output power) are supported.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Copyright © 2006, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.