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CY8C24094_11 PDF预览

CY8C24094_11

更新时间: 2022-10-24 12:38:34
品牌 Logo 应用领域
赛普拉斯 - CYPRESS /
页数 文件大小 规格书
59页 1651K
描述
PSoC Programmable System-on-Chip Low power at high speed

CY8C24094_11 数据手册

 浏览型号CY8C24094_11的Datasheet PDF文件第4页浏览型号CY8C24094_11的Datasheet PDF文件第5页浏览型号CY8C24094_11的Datasheet PDF文件第6页浏览型号CY8C24094_11的Datasheet PDF文件第8页浏览型号CY8C24094_11的Datasheet PDF文件第9页浏览型号CY8C24094_11的Datasheet PDF文件第10页 
CY8C24094, CY8C24794  
CY8C24894, CY8C24994  
read and write data memory, and read and write I/O registers.  
You can read and write CPU registers, set and clear breakpoints,  
and provide program run, halt, and step control. The debugger  
also allows you to create a trace buffer of registers and memory  
locations of interest.  
6.1.5 In-Circuit Emulator  
A low-cost, high-functionality In-Circuit Emulator (ICE) is  
available for development support. This hardware can program  
single devices.  
The emulator consists of a base unit that connects to the PC  
using a USB port. The base unit is universal and operates with  
all PSoC devices. Emulation pods for each device family are  
available separately. The emulation pod takes the place of the  
PSoC device in the target board and performs full speed  
(24-MHz) operation.  
6.1.4 Online Help System  
The online help system displays online, context-sensitive help.  
Designed for procedural and quick reference, each functional  
subsystem has its own context-sensitive help. This system also  
provides tutorials and links to FAQs and an online support forum  
to aid the designer.  
7. Designing with PSoC Designer  
The development process for the PSoC® device differs from that  
of a traditional fixed function microprocessor. The configurable  
analog and digital hardware blocks give the PSoC architecture a  
unique flexibility that pays dividends in managing specification  
change during development and by lowering inventory costs.  
These configurable resources, called PSoC Blocks, have the  
ability to implement a wide variety of user-selectable functions.  
The PSoC development process is summarized in four steps:  
7.3 Organize and Connect  
You build signal chains at the chip level by interconnecting user  
modules to each other and the I/O pins. You perform the  
selection, configuration, and routing so that you have complete  
control over all on-chip resources.  
7.4 Generate, Verify, and Debug  
When you are ready to test the hardware configuration or move  
on to developing code for the project, you perform the “Generate  
Configuration Files” step. This causes PSoC Designer to  
generate source code that automatically configures the device to  
your specification and provides the software for the system. The  
generated code provides application programming interfaces  
(APIs) with high-level functions to control and respond to  
hardware events at run time and interrupt service routines that  
you can adapt as needed.  
1. Select User Modules  
2. Configure User Modules  
3. Organize and Connect  
4. Generate, Verify, and Debug  
7.1 Select User Modules  
PSoC Designer provides a library of prebuilt, pretested hardware  
peripheral components called “user modules.” User modules  
make selecting and implementing peripheral devices, both  
analog and digital, simple.  
A complete code development environment allows you to  
develop and customize your applications in either C, assembly  
language, or both.  
The last step in the development process takes place inside  
PSoC Designer’s debugger (access by clicking the Connect  
icon). PSoC Designer downloads the HEX image to the ICE  
where it runs at full speed. PSoC Designer debugging capabil-  
ities rival those of systems costing many times more. In addition  
to traditional single-step, run-to-breakpoint, and watch-variable  
features, the debug interface provides a large trace buffer and  
allows you to define complex breakpoint events. These include  
monitoring address and data bus values, memory locations and  
external signals.  
7.2 Configure User Modules  
Each user module that you select establishes the basic register  
settings that implement the selected function. They also provide  
parameters and properties that allow you to tailor their precise  
configuration to your particular application. For example, a PWM  
User Module configures one or more digital PSoC blocks, one  
for each 8 bits of resolution. The user module parameters permit  
you to establish the pulse width and duty cycle. Configure the  
parameters and properties to correspond to your chosen appli-  
cation. Enter values directly or by selecting values from  
drop-down menus. All the user modules are documented in  
datasheets that may be viewed directly in PSoC Designer or on  
the Cypress website. These user module datasheets explain the  
internal operation of the user module and provide performance  
specifications. Each datasheet describes the use of each user  
module parameter, and other information you may need to  
successfully implement your design.  
Document Number: 38-12018 Rev. *Z  
Page 7 of 59  
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