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CY8C24123A-24PXI

更新时间： 2024-02-12 17:29:11

品牌	Logo	应用领域
赛普拉斯 - CYPRESS		多功能外围设备微控制器和处理器光电二极管时钟
页数	文件大小	规格书
47页	499K
描述
PSoC Mixed-Signal Array

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技术参数
数据手册

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CY8C24123A-24PXI 技术参数

是否无铅：	不含铅	是否Rohs认证：	符合
生命周期：	Active	零件包装代码：	SOIC
包装说明：	SOIC-8	针数：	8
Reach Compliance Code：	compliant	ECCN代码：	EAR99
HTS代码：	8542.31.00.01	风险等级：	1.26
Is Samacsys：	N	其他特性：	ALSO OPERATES AT 2.7V AND 3.3V SUPPLY
地址总线宽度：		位大小：	8
边界扫描：	NO	总线兼容性：	USB
CPU系列：	M8C	最大时钟频率：	24.6 MHz
外部数据总线宽度：		JESD-30 代码：	R-PDSO-G8
JESD-609代码：	e3	长度：	4.889 mm
湿度敏感等级：	3	I/O 线路数量：	6
端子数量：	8	最高工作温度：	85 °C
最低工作温度：	-40 °C	封装主体材料：	PLASTIC/EPOXY
封装代码：	SOP	封装等效代码：	SOP8,.25
封装形状：	RECTANGULAR	封装形式：	SMALL OUTLINE
峰值回流温度（摄氏度）：	260	电源：	2.7/5 V
认证状态：	Not Qualified	RAM（字节）：	256
RAM（字数）：	256	ROM（单词）：	4096
ROM可编程性：	FLASH	座面最大高度：	1.727 mm
速度：	24 MHz	子类别：	Microcontrollers
最大压摆率：	8 mA	最大供电电压：	5.25 V
最小供电电压：	4.75 V	标称供电电压：	5 V
表面贴装：	YES	技术：	CMOS
温度等级：	INDUSTRIAL	端子面层：	Matte Tin (Sn)
端子形式：	GULL WING	端子节距：	1.27 mm
端子位置：	DUAL	处于峰值回流温度下的最长时间：	30
宽度：	3.8985 mm	Base Number Matches：	1

CY8C24123A-24PXI 数据手册

PSoC™ Mixed-Signal Array

Final Data Sheet

CY8C24123A,

CY8C24223A, and CY8C24423A

Features

■ Powerful Harvard Architecture Processor

■ M8C Processor Speeds to 24 MHz

■ 8x8 Multiply, 32-Bit Accumulate

■ Low Power at High Speed

■ Precision, Programmable Clocking

■ New CY8C24x23A PSoC Device

■ Internal ±2.5% 24/48 MHz Oscillator

■ High-Accuracy 24 MHz with Optional 32 kHz

Crystal and PLL

■ Optional External Oscillator, up to 24 MHz

■ Internal Oscillator for Watchdog and Sleep

■ Derived from the CY8C24x23 Device

■ Low Power and Low Voltage (2.4V)

■ Additional System Resources

■ 2.4 to 5.25 V Operating Voltage

■ I²C™ Slave, Master, and Multi-Master to

■ Operating Voltages Down to 1.0V Using On-

400 kHz

Chip Switch Mode Pump (SMP)

■ Flexible On-Chip Memory

■ Watchdog and Sleep Timers

■ User-Configurable Low Voltage Detection

■ Integrated Supervisory Circuit

■ On-Chip Precision Voltage Reference

■ Industrial Temperature Range: -40°C to +85°C

■ 4K Bytes Flash Program Storage 50,000

Erase/Write Cycles

■ 256 Bytes SRAM Data Storage

■ In-System Serial Programming (ISSP™)

■ Partial Flash Updates

■ Flexible Protection Modes

■ EEPROM Emulation in Flash

■ Advanced Peripherals (PSoC Blocks)

■ 6 Rail-to-Rail Analog PSoC Blocks Provide:

- Up to 14-Bit ADCs

- Up to 9-Bit DACs

- Programmable Gain Amplifiers

- Programmable Filters and Comparators

■ 4 Digital PSoC Blocks Provide:

■ Complete Development Tools

■ Free Development Software

(PSoC™ Designer)

■ Full-Featured, In-Circuit Emulator and

Programmer

■ Programmable Pin Configurations

■ 25 mA Sink on all GPIO

■ Pull up, Pull down, High Z, Strong, or Open

Drain Drive Modes on all GPIO

■ Up to 10 Analog Inputs on GPIO

■ Two 30 mA Analog Outputs on GPIO

■ Configurable Interrupt on all GPIO

- 8- to 32-Bit Timers, Counters, and PWMs

- CRC and PRS Modules

- Full-Duplex UART

- Multiple SPI™ Masters or Slaves

- Connectable to all GPIO Pins

■ Full Speed Emulation

■ Complex Breakpoint Structure

■ 128K Bytes Trace Memory

■ Complex Peripherals by Combining Blocks

Analog

Drivers

PSoC™ Functional Overview

Port 2 Port 1 Port 0

PSoC CORE

The PSoC™ family consists of many Mixed-Signal Array with

On-Chip Controller devices. These devices are designed to

replace multiple traditional MCU-based system components

with one, low cost single-chip programmable device. PSoC

devices include configurable blocks of analog and digital logic,

as well as programmable interconnects. This architecture

allows the user to create customized peripheral configurations

that match the requirements of each individual application.

Additionally, a fast CPU, Flash program memory, SRAM data

memory, and configurable IO are included in a range of conve-

nient pinouts and packages.

System Bus

Global Digital Interconnect

Global Analog Interconnect

Flash 4K

SRAM

256 Bytes

SROM

Sleep and

Watchdog

CPU Core (M8C)

Interrupt

Controller

Multiple Clock Sources

(Includes IMO, ILO, PLL, and ECO)

The PSoC architecture, as illustrated on the left, is comprised of

four main areas: PSoC Core, Digital System, Analog System,

and System Resources. Configurable global busing allows all

the device resources to be combined into a complete custom

system. The PSoC CY8C24x23A family can have up to three IO

ports that connect to the global digital and analog interconnects,

providing access to 4 digital blocks and 6 analog blocks.

DIGITAL SYSTEM

ANALOG SYSTEM

Analog

Ref

Digital

Block

Array

Analog

Block

Array

(1 Row,

4 Blocks)

(2 Columns,

6 Blocks)

Analog

Input

Muxing

The PSoC Core

The PSoC Core is a powerful engine that supports a rich fea-

ture set. The core includes a CPU, memory, clocks, and config-

urable GPIO (General Purpose IO).

POR and LVD Internal Switch

Digital

Clocks Accum.

Multiply

I²C

Decimator

Voltage

Ref.

Mode

Pump

The M8C CPU core is a powerful processor with speeds up to

24 MHz, providing a four MIPS 8-bit Harvard architecture micro-

System Resets

SYSTEM RESOURCES

September 8, 2004

12 3 4 5 6 7...47

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与CY8C24123A-24PXI相关器件

型号	品牌	描述	获取价格	数据表
CY8C24123A-24SXI	CYPRESS	PSoC Mixed-Signal Array	获取价格
CY8C24123A-24SXI	INFINEON	CY8C24x23A	获取价格
CY8C24123A-24SXIT	CYPRESS	PSoC Mixed-Signal Array	获取价格
CY8C24123A-24SXIT	INFINEON	CY8C24x23A	获取价格
CY8C24123-SPAC	CYPRESS	PSoC Mixed Signal Array	获取价格
CY8C24123-SPAE	CYPRESS	PSoC Mixed Signal Array	获取价格

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