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CY7C1020-12VC PDF预览

CY7C1020-12VC

更新时间： 2024-01-21 15:10:25
品牌 Logo 应用领域
赛普拉斯 - CYPRESS /
页数 文件大小 规格书
9页 178K
描述
32K x 16 Static RAM

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CY7C1020-12VC 技术参数

生命周期：Obsolete零件包装代码：TSOP2
包装说明：TSOP2,针数：44
Reach Compliance Code：unknownECCN代码：3A991.B.2.B
HTS代码：8542.32.00.41风险等级：5.7
最长访问时间：12 ns其他特性：AUTOMATIC POWER-DOWN
JESD-30 代码：R-PDSO-G44长度：18.41 mm
内存密度：524288 bit内存集成电路类型：STANDARD SRAM
内存宽度：16功能数量：1
端口数量：1端子数量：44
字数：32768 words字数代码：32000
工作模式：ASYNCHRONOUS最高工作温度：70 °C
最低工作温度：组织：32KX16
输出特性：3-STATE可输出：YES
封装主体材料：PLASTIC/EPOXY封装代码：TSOP2
封装形状：RECTANGULAR封装形式：SMALL OUTLINE, THIN PROFILE
并行/串行：PARALLEL认证状态：Not Qualified
座面最大高度：1.2 mm最大供电电压 (Vsup)：5.5 V
最小供电电压 (Vsup)：4.5 V标称供电电压 (Vsup)：5 V
表面贴装：YES技术：CMOS
温度等级：COMMERCIAL端子形式：GULL WING
端子节距：0.8 mm端子位置：DUAL
宽度：10.16 mm

CY7C1020-12VC 数据手册

 浏览型号CY7C1020-12VC的Datasheet PDF文件第2页浏览型号CY7C1020-12VC的Datasheet PDF文件第3页浏览型号CY7C1020-12VC的Datasheet PDF文件第4页浏览型号CY7C1020-12VC的Datasheet PDF文件第5页浏览型号CY7C1020-12VC的Datasheet PDF文件第6页浏览型号CY7C1020-12VC的Datasheet PDF文件第7页 
7C10  
CY7C1020  
32K x 16 Static RAM  
(BLE) is LOW, then data from I/O pins (I/O through I/O ), is  
Features  
1
8
written into the location specified on the address pins (A  
0
• 5.0V operation (± 10%)  
• High speed  
through A ). If Byte High Enable (BHE) is LOW, then data  
14  
from I/O pins (I/O through I/O ) is written into the location  
9
16  
specified on the address pins (A through A ).  
0
14  
— t = 10 ns  
AA  
Reading from the device is accomplished by taking Chip En-  
able (CE) and Output Enable (OE) LOW while forcing the Write  
Enable (WE) HIGH. If Byte Low Enable (BLE) is LOW, then  
data from the memory location specified by the address pins  
• Low active power  
— 825 mW (max., 10 ns, “L” version)  
• Very Low standby power  
will appear on I/O to I/O . If Byte High Enable (BHE) is LOW,  
1
8
— 550 W (max., “L” version)  
µ
then data from memory will appear on I/O to I/O . See the  
9
16  
• Automatic power-down when deselected  
• Independent Control of Upper and Lower bytes  
• Available in 44-pin TSOP II and 400-mil SOJ  
truth table at the back of this data sheet for a complete descrip-  
tion of read and write modes.  
The input/output pins (I/O through I/O ) are placed in a  
1
16  
high-impedance state when the device is deselected (CE  
HIGH), the outputs are disabled (OE HIGH), the BHE and BLE  
are disabled (BHE, BLE HIGH), or during a write operation (CE  
LOW, and WE LOW).  
Functional Description  
The CY7C1020 is a high-performance CMOS static RAM or-  
ganized as 32,768 words by 16 bits. This device has an auto-  
matic power-down feature that significantly reduces power  
consumption when deselected.  
The CY7C1020 is available in standard 44-pin TSOP type II  
and 400-mil-wide SOJ packages.  
Writing to the device is accomplished by taking Chip Enable  
(CE) and Write Enable (WE) inputs LOW. If Byte Low Enable  
Logic Block Diagram  
Pin Configuration  
SOJ / TSOP II  
DATA IN DRIVERS  
Top View  
44  
NC  
1
A
0
43  
42  
41  
40  
39  
38  
A
A
A
2
OE  
BHE  
BLE  
I/O  
I/O  
I/O  
2
3
4
5
6
14  
1
A
13  
A
11  
A6  
A5  
A4  
12  
A
CE  
I/O  
I/O  
I/O  
32K x 16  
RAM Array  
I/O1 – I/O8  
I/O9 – I/O16  
7
1
A3  
16  
37  
36  
35  
34  
33  
8
2
3
15  
14  
13  
A2  
A1  
A0  
9
10  
11  
12  
13  
I/O  
V
I/O  
4
V
SS  
CC  
V
V
SS  
CC  
I/O  
32  
I/O  
I/O  
5
6
7
8
12  
11  
I/O  
I/O  
I/O  
WE 17  
A
31  
30  
29  
28  
14  
15  
16  
I/O  
I/O  
10  
9
COLUMN DECODER  
NC  
18  
27  
26  
25  
A
3
10  
BHE  
19  
A
4
A
9
WE  
CE  
OE  
20  
A
A
8
5
21  
22  
A
6
A
24  
23  
7
1020-2  
NC  
NC  
BLE  
1020-1  
Selection Guide  
7C1020-10  
10  
7C1020-12  
7C1020-15  
7C1020-20  
Maximum Access Time (ns)  
12  
170  
140  
3
15  
160  
130  
3
20  
160  
130  
3
Maximum Operating Current (mA)  
180  
150  
3
L
L
Maximum CMOS Standby Current (mA)  
0.1  
0.1  
0.1  
0.1  
Cypress Semiconductor Corporation  
•
3901 North First Street  
•
San Jose  
•
CA 95134  
•
408-943-2600  
October 18, 1999  
1234567...9

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