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CY62136VLL-70ZI

更新时间： 2024-11-04 21:55:07
品牌 Logo 应用领域
赛普拉斯 - CYPRESS 存储内存集成电路静态存储器光电二极管
页数 文件大小 规格书
12页 221K
描述
128K x 16 Static RAM

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中文翻译

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CY62136VLL-70ZI 技术参数

是否Rohs认证： 不符合生命周期：Obsolete
零件包装代码：TSOP2包装说明：TSOP2-44
针数：44Reach Compliance Code：not_compliant
ECCN代码：3A991.B.2.AHTS代码：8542.32.00.41
Factory Lead Time：1 week风险等级：5.74
最长访问时间：70 nsI/O 类型：COMMON
JESD-30 代码：R-PDSO-G44JESD-609代码：e0
长度：18.415 mm内存密度：2097152 bit
内存集成电路类型：STANDARD SRAM内存宽度：16
湿度敏感等级：3功能数量：1
端子数量：44字数：131072 words
字数代码：128000工作模式：ASYNCHRONOUS
最高工作温度：85 °C最低工作温度：-40 °C
组织：128KX16输出特性：3-STATE
封装主体材料：PLASTIC/EPOXY封装代码：TSOP2
封装等效代码：TSOP44,.46,32封装形状：RECTANGULAR
封装形式：SMALL OUTLINE, THIN PROFILE并行/串行：PARALLEL
峰值回流温度（摄氏度）：240电源：3/3.3 V
认证状态：Not Qualified座面最大高度：1.194 mm
最大待机电流：0.0000075 A最小待机电流：1 V
子类别：SRAMs最大压摆率：0.02 mA
最大供电电压 (Vsup)：3.6 V最小供电电压 (Vsup)：2.7 V
标称供电电压 (Vsup)：3 V表面贴装：YES
技术：CMOS温度等级：INDUSTRIAL
端子面层：Tin/Lead (Sn/Pb)端子形式：GULL WING
端子节距：0.8 mm端子位置：DUAL
处于峰值回流温度下的最长时间：30宽度：10.16 mm
Base Number Matches：1

CY62136VLL-70ZI 数据手册

 浏览型号CY62136VLL-70ZI的Datasheet PDF文件第2页浏览型号CY62136VLL-70ZI的Datasheet PDF文件第3页浏览型号CY62136VLL-70ZI的Datasheet PDF文件第4页浏览型号CY62136VLL-70ZI的Datasheet PDF文件第5页浏览型号CY62136VLL-70ZI的Datasheet PDF文件第6页浏览型号CY62136VLL-70ZI的Datasheet PDF文件第7页 
CY62136V MoBL™  
128K x 16 Static RAM  
HIGH), outputs are disabled (OE HIGH), BHE and BLE are  
disabled (BHE, BLE HIGH), or during a write operation (CE  
LOW, and WE LOW).  
Features  
• Low voltage range:  
— CY62136V: 2.7V-3.6V  
Writing to the device is accomplished by taking Chip Enable  
(CE) and Write Enable (WE) inputs LOW. If Byte Low Enable  
(BLE) is LOW, then data from I/O pins (I/O0 through I/O7), is  
written into the location specified on the address pins (A0  
through A16). If Byte High Enable (BHE) is LOW, then data  
from I/O pins (I/O8 through I/O15) is written into the location  
specified on the address pins (A0 through A16).  
• Ultra-low active, standby power  
• Easy memory expansion with CE and OE features  
• TTL-compatible inputs and outputs  
• Automatic power-down when deselected  
• CMOS for optimum speed/power  
Functional Description  
Reading from the device is accomplished by taking Chip En-  
able (CE) and Output Enable (OE) LOW while forcing the Write  
Enable (WE) HIGH. If Byte Low Enable (BLE) is LOW, then  
data from the memory location specified by the address pins  
will appear on I/O0 to I/O7. If Byte High Enable (BHE) is LOW,  
then data from memory will appear on I/O8 to I/O15. See the  
Truth Table at the back of this data sheet for a complete de-  
scription of read and write modes.  
The CY62136V is a high-performance CMOS static RAM or-  
ganized as 131,072 words by 16 bits. This device features ad-  
vanced circuit design to provide ultra-low active current. This  
is ideal for providing More Battery Life™ (MoBL™) in portable  
applications such as cellular telephones. The device also has  
an automatic power-down feature that significantly reduces  
power consumption by 99% when addresses are not toggling.  
The device can also be put into standby mode when deselect-  
ed (CE HIGH). The input/output pins (I/O0 through I/O15) are  
placed in a high-impedance state when: deselected (CE  
The CY62136V is available in 48-ball FBGA and standard  
44-pin TSOP Type II (forward pinout) packaging.  
Logic Block Diagram  
Pin Configurations  
TSOP II (Forward)  
Top View  
44  
1
A
4
A
5
43  
42  
41  
40  
39  
38  
A
A
2
3
4
5
6
3
6
DATA IN DRIVERS  
A
A
2
7
OE  
A
1
A
8
BHE  
BLE  
I/O  
A
0
A
7
CE  
A
I/O  
6
7
0
15  
37  
36  
35  
34  
33  
A
I/O  
I/O  
8
I/O  
I/O  
5
1
2
14  
13  
12  
128K x 16  
9
A
4
10  
11  
12  
13  
I/O  
V
SS  
RAM Array  
1024 X 2048  
I/O –I/O  
I/O  
3
CC  
0
7
A
3
V
SS  
A
A
V
V
2
I/O –I/O  
CC  
8
15  
32  
I/O  
I/O  
I/O  
4
5
6
7
11  
10  
1
0
31  
30  
29  
28  
I/O  
I/O  
I/O  
14  
15  
16  
A
I/O  
I/O  
9
8
WE 17  
NC  
18  
27  
26  
25  
A
A
8
16  
19  
A
A
9
COLUMN DECODER  
15  
A
A
A
20  
21  
22  
A
11  
14  
10  
A
24  
23  
13  
NC  
12  
BHE  
WE  
CE  
OE  
BLE  
MoBL and More Battery Life are trademarks of Cypress Semiconductor Corporation.  
Cypress Semiconductor Corporation  
•
3901 North First Street  
•
San Jose  
•
CA 95134  
•
408-943-2600  
Document #: 38-05087 Rev. **  
Revised September 5, 2000  
1234567...12

中文翻译

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CY62136VLL-70ZI 替代型号

型号 品牌 替代类型 描述 数据表
CY62136VLL-70ZXI CYPRESS

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