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CY29942AXIT PDF预览

CY29942AXIT

更新时间: 2024-11-25 21:11:03
品牌 Logo 应用领域
赛普拉斯 - CYPRESS 驱动逻辑集成电路
页数 文件大小 规格书
7页 243K
描述
Low Skew Clock Driver, 29942 Series, 18 True Output(s), 0 Inverted Output(s), PQFP32, 7 X 7 MM, 1.40 MM HEIGHT, LEAD FREE, PLASTIC, LQFP-32

CY29942AXIT 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Obsolete零件包装代码:QFP
包装说明:LQFP, QFP32,.35SQ,32针数:32
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.31.00.01风险等级:5.77
其他特性:CAN ALSO OPERATE AT 3.3V SUPPLY系列:29942
输入调节:STANDARDJESD-30 代码:S-PQFP-G32
JESD-609代码:e3长度:7 mm
逻辑集成电路类型:LOW SKEW CLOCK DRIVER最大I(ol):0.02 A
湿度敏感等级:3功能数量:1
反相输出次数:端子数量:32
实输出次数:18最高工作温度:85 °C
最低工作温度:-40 °C封装主体材料:PLASTIC/EPOXY
封装代码:LQFP封装等效代码:QFP32,.35SQ,32
封装形状:SQUARE封装形式:FLATPACK, LOW PROFILE
峰值回流温度(摄氏度):260电源:2.5/3.3 V
Prop。Delay @ Nom-Sup:4.4 ns传播延迟(tpd):4.4 ns
认证状态:Not QualifiedSame Edge Skew-Max(tskwd):0.2 ns
座面最大高度:1.6 mm子类别:Clock Drivers
最大供电电压 (Vsup):2.625 V最小供电电压 (Vsup):2.375 V
标称供电电压 (Vsup):2.5 V表面贴装:YES
温度等级:INDUSTRIAL端子面层:Matte Tin (Sn)
端子形式:GULL WING端子节距:0.8 mm
端子位置:QUAD处于峰值回流温度下的最长时间:20
宽度:7 mmBase Number Matches:1

CY29942AXIT 数据手册

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CY29942  
2.5V or 3.3V, 200 MHz, 1:18 Clock  
Distribution Buffer  
Features  
Description  
200 MHz Clock Support  
The CY29942 is a low voltage 200 MHz clock distribution buffer  
with an LVCMOS or LVTTL compatible input clock. All other  
control inputs are LVCMOS/LVTTL compatible. The eighteen  
outputs are 2.5V or 3.3V LVCMOS or LVTTL compatible and can  
drive 50Ω series or parallel terminated transmission lines. For  
series terminated transmission lines, each output can drive one  
or two traces giving the devices an effective fanout of 1:36. Low  
output-to-output skews make the CY29942 an ideal clock distri-  
bution buffer for nested clock trees in the most demanding of  
synchronous systems.  
2.5V or 3.3V Operation  
LVCMOS/LVTTL Clock Input  
LVCMOS-/LVTTL-Compatible Inputs  
18 Clock Outputs: Drive up to 36 Clock Lines  
110 ps Typical Output-to-output Skew  
Output Enable Control  
Pin Compatible with MPC942C  
Available in Industrial and Commercial  
32-pin LQFP package  
Logic Block Diagram  
VDD  
18  
TCLK  
OE  
Q0-Q17  
Cypress Semiconductor Corporation  
Document #: 38-07284 Rev. *D  
198 Champion Court  
San Jose, CA 95134-1709  
408-943-2600  
Revised September 10, 2009  
[+] Feedback  

CY29942AXIT 替代型号

型号 品牌 替代类型 描述 数据表
CY29942AXI CYPRESS

完全替代

暂无描述
CY29940AXI CYPRESS

类似代替

2.5V or 3.3V, 200-MHz, 1:18 Clock Distribution Buffer

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