Datasheet > CY24202

CY24202

更新时间： 2024-11-23 23:44:55

品牌	Logo	应用领域
其他 - ETC		时钟
页数	文件大小	规格书
12页	170K
描述
Clocks and Buffers

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中文翻译

获取价格

数据手册

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CY24202 数据手册

PRELIMINARY

CY24202

27-MHz Clock Generator with

Serial Programming Interface

Features

• Integrated phase-locked loop

• Low jitter, high accuracy outputs

• Serial Programming Interface (SPI)

• 3.3V Operation

Benefits

High-performance PLL tailored for multimedia applications

Meets critical timing requirements in complex system designs

Dynamic Digital VCXO control

Enables application compatibility in low power systems

Part Number Outputs

CY24202

Input Frequency Range

Output Frequencies

13.5-MHz pullablecrystal input per

Cypress Specification

2 copies of 27 MHz

Logic Block Diagram

13.5 XIN

CLK2

OUTPUT

DIVIDERS

VCO

OSC

XOUT

CLK1

PLL

Digital VCXO

Serial

SCLK

SDAT

Programming

Interface

VSS

VDD

Pin Configuration

CY24202

8-pin SOIC

XOUT

XIN

CLK2

CLK1

VDD

SDAT

VSS

SCLK

Cypress Semiconductor Corporation

•

3901 North First Street

•

San Jose

•

CA 95134

•

408-943-2600

Document #: 38-07198 Rev. *A

Revised December 14, 2002

12 3 4 5 6 7...12

中文翻译

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CY24204ZC-2T	CYPRESS	获取价格	Video Clock Generator, 74.175MHz, CMOS, PDSO16, 4.40 MM, TSSOP-16
CY24204ZC-3	CYPRESS	获取价格	MediaClock⑩ DTV, STB Clock Generator
CY24204ZC-3T	CYPRESS	获取价格	MediaClock⑩ DTV, STB Clock Generator