Datasheet > CY24130_08

CY24130_08

更新时间： 2022-10-24 11:38:33

品牌	Logo	应用领域
赛普拉斯 - CYPRESS		时钟
页数	文件大小	规格书
6页	205K
描述
HOTLink II? SMPTE Receiver Training Clock

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CY24130_08 数据手册

CY24130

Pin Configuration

Figure 1. CY24130-1, -2, 16-pin TSSOP

XOUT

XIN

VDD

REFCLK

VSS

AVDD

AVSS

VSSL

N/C

VDDL

N/C

CLKA

N/C

Table 3. Pin Definition

Name

XIN

Pin Number

Description

Reference Crystal Input.

Voltage Supply.

V_DD

AV_DD

Analog Voltage Supply.

Frequency Select 0.

Analog Ground.

AV_SS

V_SSL

N/C

VDDL Ground.

No Connect.

CLKA

N/C

27-/36-/54-/148.50-/74.25-MHz Clock Output (frequency selectable).

No Connect.

Frequency Select 1.

Voltage Supply.

V_DDL

N/C

No Connect.

VSS

REFCLK

Ground.

Reference Clock Output.

Frequency Select 2.

Reference Crystal Output. Leave floating for -1.

XOUT

Absolute Maximum Conditions

Parameter

_DD,AV_DD

Description

Supply Voltage

Min.

Max.

Unit

–0.5

7.0

V_DDL

T_J

I/O Supply Voltage

Junction Temperature

Digital Inputs

–

7.0

125

–

AV_SS– 0.3

°C

AV_DD+ 0.3

–

Electro-Static Discharge

Recommended Operating Conditions

Parameter

Description

Min.

Typ.

3.3

–

Max.

Unit

_DD/AV_DDL/V_DDLOperating Voltage

3.135

3.465

T_A

Ambient Temperature

Max. Load Capacitance

Reference Frequency

–

°C

C_LOAD

f_REF

–

MHz

C_LNOM

Nominal Parallel Crystal Load

Capacitance for -2

Document #: 38-07711 Rev. *A

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