CY23EP05

更新时间： 2024-09-06 04:37:59

品牌	Logo	应用领域
赛普拉斯 - CYPRESS		/
页数	文件大小	规格书
12页	393K
描述
2.5V or 3.3V,10- 220 MHz, Low Jitter, 5 Output Zero Delay Buffer

阅读下载

中文翻译

获取价格

数据手册

如果您发现信息不准确，欢迎纠错

CY23EP05 数据手册

CY23EP05

2.5V or 3.3V,10- 220 MHz, Low Jitter, 5 Output

Zero Delay Buffer

Features

Functional Description

• 10 MHz to 220 MHz maximum operating range

The CY23EP05 is a 2.5V or 3.3V zero delay buffer designed

to distribute low-jitter high-speed clocks and is available in a

8-pin SOIC package. It accepts one reference input, and

drives out five low-skew clocks. The -1H version operates up

to 220 (200) MHz frequencies at 3.3V (2.5V), and has a higher

drive strength than the -1 devices. All parts have on-chip PLLs

which lock to an input clock on the REF pin. The PLL feedback

is on-chip and is obtained from the CLKOUT pad.

• Zero input-output propagation delay, adjustable by

loading on CLKOUT pin

• Multiple low-skew outputs

— 30 ps typical output-output skew

— One input drives five outputs

• 22 ps typical cycle-to-cycle jitter

• 13 ps typical period jitter

The CY23EP05 PLL enters a power-down mode when there

are no rising edges on the REF input (<~2 MHz). In this state,

the outputs are three-stated and the PLL is turned off, resulting

in less than 25 µA of current draw.

• Standard and High drive strength options

• Available in space-saving 150-mil SOIC package

• 3.3V or 2.5V operation

The CY23EP05 is available in different configurations, as

shown in the Ordering Information table. The CY23EP05-1 is

the base part. The CY23EP05-1H is the high-drive version of

the -1, and its rise and fall times are much faster than the -1.

• Industrial temperature available

These parts are not intended for 5V input-tolerant applications

Block Diagram

Pin Configuration

Top View

CLKOUT

CLK1

PLL

REF

CLKOUT

CLK4

REF

CLK2

CLK1

GND

CLK2

CLK3

CLK4

Cypress Semiconductor Corporation

Document #: 38-07759 Rev. *B

•

198 Champion Court

•

San Jose, CA 95134-1709

•

408-943-2600

Revised December 13, 2005

12 3 4 5 6 7...12

中文翻译

下载PDF

与CY23EP05相关器件

型号	品牌	获取价格	描述	数据表
CY23EP05_11	CYPRESS	获取价格	2.5 V or 3.3 V,10-220-MHz, Low Jitter, 5 Output Zero Delay Buffer
CY23EP05SXC-1	CYPRESS	获取价格	2.5V or 3.3V,10- 220 MHz, Low Jitter, 5 Output Zero Delay Buffer
CY23EP05SXC-1	INFINEON	获取价格	2.5V or 3.3V,10- 220 MHz, Low Jitter, 5 Output Zero Delay Buffer
CY23EP05SXC-1H	CYPRESS	获取价格	2.5V or 3.3V,10- 220 MHz, Low Jitter, 5 Output Zero Delay Buffer
CY23EP05SXC-1H	INFINEON	获取价格	2.5V or 3.3V,10- 220 MHz, Low Jitter, 5 Output Zero Delay Buffer
CY23EP05SXC-1HT	CYPRESS	获取价格	2.5V or 3.3V,10- 220 MHz, Low Jitter, 5 Output Zero Delay Buffer
CY23EP05SXC-1HT	INFINEON	获取价格	2.5V or 3.3V,10- 220 MHz, Low Jitter, 5 Output Zero Delay Buffer
CY23EP05SXC-1T	CYPRESS	获取价格	2.5V or 3.3V,10- 220 MHz, Low Jitter, 5 Output Zero Delay Buffer
CY23EP05SXC-1T	INFINEON	获取价格	2.5V or 3.3V,10- 220 MHz, Low Jitter, 5 Output Zero Delay Buffer
CY23EP05SXC-T	CYPRESS	获取价格	PLL Based Clock Driver, 23EP Series, 4 True Output(s), 0 Inverted Output(s), PDSO8, 0.150