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CY2264PVC-2

更新时间： 2024-11-17 19:45:43
品牌 Logo 应用领域
赛普拉斯 - CYPRESS 时钟光电二极管外围集成电路晶体
页数 文件大小 规格书
10页 134K
描述
Processor Specific Clock Generator, 75MHz, MOS, PDSO34, SSOP-34

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CY2264PVC-2 技术参数

是否Rohs认证： 不符合生命周期：Obsolete
零件包装代码：SSOP包装说明：SSOP-34
针数：34Reach Compliance Code：not_compliant
ECCN代码：EAR99HTS代码：8542.39.00.01
风险等级：5.92JESD-30 代码：R-PDSO-G34
JESD-609代码：e0长度：17.9324 mm
端子数量：34最高工作温度：70 °C
最低工作温度：最大输出时钟频率：75 MHz
封装主体材料：PLASTIC/EPOXY封装代码：SOP
封装等效代码：SOP34,.4,40封装形状：RECTANGULAR
封装形式：SMALL OUTLINE峰值回流温度（摄氏度）：NOT SPECIFIED
电源：3.3 V主时钟/晶体标称频率：14.318 MHz
认证状态：Not Qualified座面最大高度：2.6416 mm
子类别：Clock Generators最大压摆率：140 mA
最大供电电压：3.6 V最小供电电压：3.135 V
标称供电电压：3.3 V表面贴装：YES
技术：MOS温度等级：COMMERCIAL
端子面层：Tin/Lead (Sn/Pb)端子形式：GULL WING
端子节距：1.016 mm端子位置：DUAL
处于峰值回流温度下的最长时间：NOT SPECIFIED宽度：7.5057 mm
uPs/uCs/外围集成电路类型：CLOCK GENERATOR, PROCESSOR SPECIFICBase Number Matches：1

CY2264PVC-2 数据手册

 浏览型号CY2264PVC-2的Datasheet PDF文件第2页浏览型号CY2264PVC-2的Datasheet PDF文件第3页浏览型号CY2264PVC-2的Datasheet PDF文件第4页浏览型号CY2264PVC-2的Datasheet PDF文件第5页浏览型号CY2264PVC-2的Datasheet PDF文件第6页浏览型号CY2264PVC-2的Datasheet PDF文件第7页 
1CY2264  
fax id: 3524  
PRELIMINARY  
CY2264  
Pentium™, Pentium Pro™, and Cyrix 6x86  
Compatible Clock Synthesizer/Driver  
• Smooth slewing in-system frequency changes (2  
MHz/ms typical)  
Features  
• Complete clock solution to meet requirements of Pen-  
tium™, Pentium Pro™, or Cyrix 6x86 motherboards in-  
cluding dual-processor and SDRAM designs  
• Doze Mode support, CPUCLK = 33.33 MHz  
• 3.3V operation, 5V tolerant inputs  
• Available in space-saving 34-pin SSOP package  
— Eight CPU clock outputs, up to 75 MHz (seeFunction  
Table)  
Functional Description  
— Six PCI clock outputs, synchronous or asynchro-  
nous mode, pin-selectable by Bus Select input  
The CY2264 is a low-cost Clock Synthesizer/Driver chip for a  
Pentium, Pentium Pro, or Cyrix 6x86-based motherboard.  
— One USB clock at 48 MHz, meets Intel’s accuracy,  
jitter, as well as rise and fall time requirements  
The CPU clocks of the CY2264 have less than 200 ps cy-  
cle-to-cycle jitter. Both the CPU and PCI clocks have a slew  
rate of greater than 1V/ns. The USB clock meets Intel’s accu-  
racy, jitter, and rise and fall time requirements.  
— One I/O clock at 24 MHz  
— Two Ref. clocks at 14.318 MHz  
• Three dedicated, independent Frequency Select inputs  
(internal pull-up)easesystem design, enable in-system  
frequency changes, and support OE control and Test  
Mode  
• Low CPU clock jitter ≤ 200 ps cycle-to-cycle  
• Low skew outputs  
All CPU clocks have a unique dual-speed frequency change  
logic to support fast clock stabilization on power-up (< 2 ms)  
and slow frequency changes during operation (2 MHz/ms typ-  
ical). Three dedicated Frequency Select inputs facilitate the  
latter, and support OE, Test Mode, and Doze Mode functional-  
ity.  
— ≤ 250 ps between CPU clocks  
The CY2264 clock outputs are designed for low EMI emis-  
sions. Controlled rise and fall times, unique output driver cir-  
cuits, and innovative circuit layout techniques enable the  
CY2264 to have lower EMI than clock devices from other man-  
ufacturers. Please refer to the application note “Layout and  
Termination Techniques for Cypress Clock Generators” for  
more information on recommended system layout techniques.  
— ≤ 250 ps between PCI clocks  
— 1ns−4ns skew between CPU and PCI clocks (in syn-  
chronousmode) for compatibility with SiS 55XX and  
Intel 82430HX and 82430VX chipsets (CY2264–1)  
— 500 ps typ. skew between CPU and PCI clocks (in  
synchronous mode) for compatibility with ALI Alad-  
din III and other chipsets (CY2264–2)  
The CY2264 accepts a 14.318 MHz reference crystal or clock  
as its input and runs off a 3.3V supply. The CY2264 is available  
in a space-saving, low-cost 34-pin SSOP package and is  
pin-compatible with the CY2265 for designs requiring addition-  
al SDRAM support.  
• Improved output drivers are designed for low EMI  
• Meets Pentium and Pentium Pro power-upstabilization  
requirements  
Pin Configuration  
Logic Block Diagram  
Top View  
REF0(14.318MHz)  
SSOP  
REF1(14.318MHz)  
V
DD  
REF0  
REF1  
1
2
3
4
34  
33  
32  
31  
XTALIN  
14.318  
MHz  
OSC.  
CPU  
PLL  
XTALIN  
MUX  
CPUCLK[1–8]  
XTALOUT  
XTALOUT  
AV  
DD  
/2  
/2  
V
SS  
IOCLK  
ROM  
S2  
USBCLK  
5
30  
29  
28  
27  
26  
25  
24  
23  
Delay  
(–1only)  
CPUCLK1  
V
SS  
6
S0  
S1  
S2  
PCICLK6  
PCICLK5  
7
CPUCLK2  
/2  
8
V
DD  
IOCLK(24MHz)  
V
DD  
CPUCLK3  
CPUCLK4  
9
SYS  
PLL  
PCICLK4  
PCICLK3  
10  
11  
12  
MUX  
V
SS  
/2  
USBCLK(48MHz)  
CPUCLK5  
CPUCLK6  
V
SS  
/3  
PCICLK2  
PCICLK1  
13  
14  
22  
21  
20  
19  
18  
V
DD  
MUX  
BSEL  
V
SS  
S1  
S0  
15  
16  
17  
PCICLK[1–6]  
BSEL  
CPUCLK7  
CPUCLK8  
Intel is a registered trademark of Intel Corporation.  
Cyrix is a registered trademark of Cyrix Corporation.  
Pentium and Pentium Pro are trademarks of Intel Corporation.  
Cypress Semiconductor Corporation  
•
3901 North First Street  
•
San Jose  
•
CA 95134  
•
408-943-2600  
August 1996 - Revised May 27, 1997  
1234567...10

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