CY2267
Pentium , Pentium Pro, and Cyrix 6x86
Compatible Clock Synthesizer/Driver
Functional Description
Features
• Complete clock solution to meet requirements of Pen-
tium®, Pentium® Pro, or Cyrix® 6x86 motherboards in-
cluding dual-processor and SDRAM designs
The CY2267 is a low-cost Clock Synthesizer/Driver chip for a
Pentium, Pentium Pro, or Cyrix 6x86-based motherboard.
The CY2267 outputs sixteen CPU clocks, twelve of which can
be used to support up to three SDRAM modules. The PCI
clock output can be buffered with an external, low-cost Zero
Delay Buffer (CY2305/9), thus providing a complete solution
for 82430TX desktop systems.
— Sixteen CPU clock outputs, up to 66.66 MHz (see
Function Table)
— One synchronous PCI clock output
— One USB clock at 48 MHz, meets Intel’s accuracy,
jitter, as well as rise and fall time requirements
The CPU clocks of the CY2267 have less than 200 ps cy-
cle-to-cycle jitter. Both the CPU and PCI clocks have a slew
rate of greater than 1V/ns. The USB clock meets Intel’s accu-
racy, jitter, and rise and fall time requirements.
— One I/O clock at 24 MHz
— One Ref. clock at 14.318 MHz
• Two dedicated, independent Frequency Select inputs
(internalpull-up)easesystemdesign,enable in-system
frequency changes, and support OE control
All CPU clocks support fast clock stabilization on power-up
(< 2 ms). Additionally, two dedicated Frequency Select inputs
are used for Output Enable control and setting the CPU clock
output frequencies.
• Low CPU clock jitter 200 ps cycle-to-cycle
≤
• Low skew outputs
The CY2267 clock outputs are designed for low EMI emis-
sions. Controlled rise and fall times, unique output driver cir-
cuits, and innovative circuit layout techniques enable the
CY2267 to have lower EMI than clock devices from other man-
ufacturers. Please refer to the application note “Layout and
Termination Techniques for Cypress Clock Generators” for
more information on recommended system layout techniques.
—
250 ps between CPU clocks
≤
— 1ns 3ns skew between CPU and PCI clocks for com-
−
patibility with SiS 55XX as well as Intel 82430TX,
82430HX, and 82430VX chipsets (CY2267–1)
• Improved output drivers are designed for low EMI
• Meets Pentium and Pentium Pro power-up stabilization
requirements
• 3.3V operation, 5V tolerant inputs
• Available in space-saving 34-pin SSOP package
The CY2267 accepts a 14.318 MHz reference crystal or clock
as its input and runs off a 3.3V supply. The CY2267 is available
in a space-saving, low-cost 34-pin SSOP package and is
pin-compatible with the CY2264 and CY2265.
Pin Configuration
Logic Block Diagram
Top View
REFCLK (14.318MHz)
SSOP
V
DD
S2
1
2
3
4
34
33
32
31
XTALIN
14.318
MHz
OSC.
CPU
PLL
CPUCLK [1–16]
XTALIN
REFCLK
XTALOUT
XTALOUT
V
DD
/2
V
SS
IOCLK
ROM
CPUCLK16
CPUCLK1
USBCLK
5
30
29
28
27
26
25
24
23
Delay
(–1only)
V
SS
6
PCICLK
7
CPUCLK2
S1
S2
/2
CPUCLK13
8
V
DD
IOCLK (24MHz)
V
DD
CPUCLK3
CPUCLK4
9
CPUCLK12
CPUCLK11
10
11
12
SYS
PLL
V
SS
/2
USBCLK (48MHz)
CPUCLK5
CPUCLK6
V
SS
CPUCLK10
CPUCLK9
13
14
22
21
20
19
18
V
DD
V
SS
S1
15
16
17
PCICLK
CPUCLK14
CPUCLK8
CPUCLK15
CPUCLK7
2267–a
2267–b
Intel and Pentium are registered trademarks of Intel Corporation.
Cyrix is a registered trademark of Cyrix Corporation.
Cypress Semiconductor Corporation
•
3901 North First Street
•
San Jose
•
CA 95134
•
408-943-2600
September 1996 - Revised June 12, 1997