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CY2275APVC-12 PDF预览

CY2275APVC-12

更新时间： 2024-09-30 20:07:07
品牌 Logo 应用领域
赛普拉斯 - CYPRESS 时钟光电二极管外围集成电路晶体
页数 文件大小 规格书
12页 199K
描述
Processor Specific Clock Generator, 66.654MHz, CMOS, PDSO48, SSOP-48

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CY2275APVC-12 技术参数

是否Rohs认证： 不符合生命周期：Obsolete
零件包装代码：SSOP包装说明：SSOP-48
针数：48Reach Compliance Code：not_compliant
ECCN代码：EAR99HTS代码：8542.39.00.01
风险等级：5.82其他特性：ALSO NEEDS VCC OF 3.135V TO 3.465V
JESD-30 代码：R-PDSO-G48JESD-609代码：e0
长度：15.875 mm端子数量：48
最高工作温度：70 °C最低工作温度：
最大输出时钟频率：66.654 MHz封装主体材料：PLASTIC/EPOXY
封装代码：SSOP封装等效代码：SSOP48,.4
封装形状：RECTANGULAR封装形式：SMALL OUTLINE, SHRINK PITCH
峰值回流温度（摄氏度）：NOT SPECIFIED电源：2.5,3.3 V
主时钟/晶体标称频率：14.318 MHz认证状态：Not Qualified
座面最大高度：2.794 mm子类别：Clock Generators
最大压摆率：300 mA最大供电电压：2.9 V
最小供电电压：2.375 V标称供电电压：2.5 V
表面贴装：YES技术：CMOS
温度等级：COMMERCIAL端子面层：Tin/Lead (Sn/Pb)
端子形式：GULL WING端子节距：0.635 mm
端子位置：DUAL处于峰值回流温度下的最长时间：NOT SPECIFIED
宽度：7.5 mmuPs/uCs/外围集成电路类型：CLOCK GENERATOR, PROCESSOR SPECIFIC
Base Number Matches：1

CY2275APVC-12 数据手册

 浏览型号CY2275APVC-12的Datasheet PDF文件第2页浏览型号CY2275APVC-12的Datasheet PDF文件第3页浏览型号CY2275APVC-12的Datasheet PDF文件第4页浏览型号CY2275APVC-12的Datasheet PDF文件第5页浏览型号CY2275APVC-12的Datasheet PDF文件第6页浏览型号CY2275APVC-12的Datasheet PDF文件第7页 
CY2275A  
Pentium®/II Clock Synthesizer/Driver for Desktop PCs with  
Intel 82440LX with 3 DIMMs  
One of the PCI clocks is free-running. Additionally, the part  
outputs twelve 3.3V SDRAM clocks, two 2.5V IOAPIC clocks  
at 14.318 MHz, and one 3.3V reference clock at 14.318 MHz.  
Features  
• Mixed 2.5V and 3.3V operation  
• Clock solution to meet requirements of Pentium® and  
Pentium® II motherboards  
The part has power-down, CPU stop, and PCI stop pins for  
power management control. These inputs are multiplexed with  
SDRAM clock outputs, and are selected when the MODE pin  
is driven LOW. Additionally, these inputs are synchronized  
on-chip, enabling glitch-free output transitions. When the  
CPU_STOP input is asserted, the CPU clock outputs are driv-  
en LOW. When the PCI_STOP input is asserted, the PCI clock  
outputs (except the free-running PCI clock) are driven LOW.  
Finally, when the PWR_DWN pin is asserted, the reference  
oscillator and PLLs are shut down, and all outputs are driven  
LOW.  
— Four CPU clocks at 2.5V  
— Up to twelve 3.3V SDRAM clocks  
— Seven synchronous PCI clocks  
— Two 2.5V IOAPIC clocks at 14.318 MHz  
— One 3.3V Ref. clock at 14.318 MHz  
• 1 ns–5.8 ns CPU-PCI delay, factory-EPROM  
programmable  
2
• I C™ Serial Configuration Interface  
T
The CY2275A outputs are designed for low EMI emission.  
• Factory-EPROM programmable output drive and slew  
rate for EMI cusomization  
• Factory-EPROM programmable CPU clock frequencies  
for custom configurations  
Controlled rise and fall times, unique output driver circuits and  
factory-EPROM programmable output drive and slew-rate en-  
able optimal configurations for EMI control.  
• Powerdown, CPU stop and PCIstop pins forpower man-  
agement  
• High drive, low skew (<250ps) and low jitter outputs  
• Intel Test Mode support  
CY2275A Selector Guide  
Clocks Outputs  
CPU@2.5V (66.6MHz)  
-12  
4
• Available in space-saving 48-pin SSOP package  
SDRAM  
9/12  
[1]  
PCI (33.3MHz)  
IOAPIC (14.318 MHz)  
Ref (14.318MHz)  
CPU-PCI delay  
7
Functional Description  
2
1
The CY2275A is a Clock Synthesizer/Driver for a Pentium and  
Pentium II-based PCs using an Intel 82440LX or similar  
core-logic chipset.  
1-5.8 ns  
The CY2275A outputs four CPU clocks at 2.5V. There are sev-  
en PCI clocks, running at one half the CPU clock frequency.  
Note:  
1. One free-running PCI clock.  
Pin Configuration  
Logic Block Diagram  
Top View  
SSOP  
IOAPIC [0:1] (14.318 MHz)  
VDDQ2  
AV  
V
DD  
1
48  
47  
46  
DDQ2  
REF0  
2
3
4
IOAPIC0  
IOAPIC1  
REF0 (14.318 MHz)  
XTALIN  
14.318  
MHz  
OSC.  
V
SS  
XTALIN  
45  
44  
V
SS  
XTALOUT  
5
6
7
XTALOUT  
CPUCLK0  
CPUCLK1  
STOP  
LOGIC  
CPU  
PLL  
CPUCLK [0-3]  
VDDCPU  
V
DDQ3  
43  
42  
41  
PCICLK_F  
PCICLK0  
V
DDCPU  
CPUCLK2  
CPUCLK3  
8
V
SS  
9
40  
39  
38  
SDRAM5/PWR_DWN  
SDRAM [0-4],[8-11]  
OE  
10  
11  
12  
PCICLK1  
PCICLK2  
V
SS  
SDRAM0  
SDRAM1  
MODE  
SDRAM6/CPU_STOP PCICLK3  
PCICLK4  
37  
36  
35  
34  
13  
V
DDQ3  
V
DDQ3  
14  
15  
SDRAM2  
SDRAM3  
PCICLK5  
SDRAM7/PCI_STOP  
V
/2  
16  
17  
18  
19  
20  
21  
22  
23  
24  
33  
32  
31  
30  
29  
28  
27  
26  
25  
V
SS  
SS  
SDRAM11  
SDRAM10  
SDRAM4  
Delay  
SDRAM5/PWR_DWN  
STOP  
LOGIC  
PCI [0-5]  
V
DDQ3  
V
DDQ3  
SDRAM9  
SDRAM6/CPU_STOP  
SDRAM7/PCI_STOP  
PCICLK_F  
SDRAM8  
SERIAL  
SCLK  
V
SS  
INTERFACE  
CONTROL  
LOGIC  
V
SS  
OE  
SDATA  
SCLK  
SDATA  
MODE  
Intel and Pentium are registered trademarks of Intel Corporation.  
I2C is a trademark of Philips Corporation.  
Cypress Semiconductor Corporation  
•
3901 North First Street  
•
San Jose  
•
CA 95134  
•
408-943-2600  
October 12, 1998  
1234567...12

中文翻译

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