CY2272
Pentium®, 6x86, K6 Clock Synthesizer/Driver for Mobile
PCs with Intel® 82430TX or Ali IV/V+ and 3 SO-DIMMs
the PCI clocks by 1–4 ns. Additionally, the part outputs six 3.3V
SDRAM clocks, one 3.3V USB clock at 48 MHz, one IO clock
Features
• Mixed 2.5V and 3.3V operation
at 24 MHz, and two high-drive 3.3V reference clocks at 14.318
MHz.
• Complete clock solution for Pentium®, Cyrix, and AMD
processor-based motherboards
The part possesses dedicated power-down, CPU stop, and
PCI stop pins for power management control. When the
CPU_STOP input is asserted, the CPU clock outputs are driv-
en LOW. When the PCI_STOP input is asserted, the PCI clock
outputs (except the free-running PCI clock) are driven LOW.
When the PWR_DWN pin is asserted, the reference oscillator
and PLLs are shut down, and all outputs are driven LOW.
— Four CPU clocks at 2.5V or 3.3V with three dedicated
CPU frequency select inputs
— Six 3.3V SDRAM clocks, support three portable
DIMMs
— Seven synchronous PCI clocks, one free-running,
one early
— One 3.3V 48 MHz USB clock
The CY2272 outputs are designed for low EMI emissions.
Controlled rise and fall times, unique output driver circuits and
factory-EPROM programmable output drive and slew-rate en-
able optimal configurations for EMI control.
— One 3.3V 24 MHz IO clock
— Two high drive 3.3V Ref. clocks at 14.318 MHz
• 1 ns–4 ns delay between CPU and PCI clocks
2
• I C™ Serial Configuration Interface
CY2272 Selector Guide
• Factory-EPROM programmable output drive and slew
rate for EMI customization
• Factory-EPROM programmable CPU clock frequencies
for custom configurations
• Dedicated Power-down, CPU stop and PCI stop pins
• Available in space-saving 48-pin SSOP package
Clock Outputs
CPU (13.75, 15, 16.6, 18.75, 55, 60, 66.6, 75 MHz)
SDRAM
-1
4
6
[1]
PCI (CPU/2MHz)
7
USB (48MHz)
1
Functional Description
IO (24MHz)
1
2
The CY2272 is a clock synthesizer/driver for a Pentium, Cyrix
6x86, or AMD K6 processor-based mobile PC using Intel®’s
82430TX, Aladdin IV+ or other similar chipsets.
Ref (14.318MHz)
CPU-PCI delay
1–4 ns
Note:
The CY2272-1 outputs four CPU clocks at 2.5V or 3.3V. There
are seven PCI clocks, running at one half the CPU clock fre-
quency. One of the PCI clocks is free-running. Another leads
1. One free-running PCI clock, one early PCI clock.
a
Pin Configuration
SSOP
Logic Block Diagram
Top View
REF [0-1] (14.318 MHz)
AV
V
DD
1
2
3
4
48
47
46
45
44
43
42
41
DDQ3
XTALIN
14.318
MHz
REF0
USBCLK
IOCLK
OSC.
V
SS
XTALOUT
STOP
CPU
PLL
XTALIN
V
CPUCLK [0-3]
VDDCPU
SS
LOGIC
5
6
7
XTALOUT
REF1
CPUCLK0
CPUCLK1
PWR_DWN
SEL0
V
V
DDQ3
DDCPU
PCICLK_F
CPUCLK2
CPUCLK3
8
V
SS
SEL1
SEL2
9
SDRAM [0-5]
40
39
38
37
36
35
34
33
32
31
EPROM
SYS PLL
10
11
12
PCICLK0
PCICLK1
PCICLK2
V
SS
SDRAM0
SDRAM1
V
CPU_STOP
/2 or /2.5
Delay
13
14
15
16
17
18
PCICLK3
DDQ3
V
DDQ3
SDRAM2
SDRAM3
EPCICLK
PCICLK4
PCI_STOP
V
SS
V
SS
STOP
LOGIC
PCICLK [0-5]
PCICLK_F
EPCICLK
SDRAM4
SDRAM5
V
SS
V
19
20
21
22
23
24
30
29
28
27
26
25
DDQ3
V
DDQ3
PWR_DWN
CPU_STOP
PCI_STOP
USBCLK
IOCLK
SEL1
V
SERIAL
SS
V
SEL0
SS
/2
SCLK
INTERFACE
CONTROL
LOGIC
SDATA
SCLK
SEL2
SDATA
Intel and Pentium are registered trademarks of Intel Corporation.
I2C is a trademark of Philips Corporation.
Cypress Semiconductor Corporation
•
3901 North First Street
•
San Jose
•
CA 95134
•
408-943-2600
October 12, 1998